Insight in 3D
Application of Xray MicroCT for Non-Destructive Failure Analysis and Package Characterization Morgan Cason(1), Raleigh Estrada(2)
(1)STMicroelectronics,
Via C. Olivetti 2, Agrate Brianza, ITALY (2)Xradia, 4385 Hopyard Road, Pleasanton, CA 94588, USA
Outline INTRODUCTION AND MOTIVATIONS FAILURE ANALYSIS Current FA methodologies (electrical Fault Isolation, X-section, SEM inspection) and revision of the FA flow. Example of X-ray X ray MicroCT usage in FA flow with 5 examples (electrical Fault Isolation, X-ray MicroCT, X-section for characterization purposes)
CONSTRUCTION ANALYSIS Current CA methodologies (X-section and evaluation of one single position per sample) Example E l off ttomography h usage iin CA fl flow with ith 4 examples l (evaluation and quantitative characterization of the entire chip volume)
CONCLUSIONS CO C S O S 2
Introduction and motivations
New small, complex packaging architectures and new package materials, such as copper wires and lead-free solder, introduced new types of failure mechanisms mechanisms.
Conventional FA techniques must be integrated with a nondestructive d t ti approach, h iin order d tto reduce d th the risk i k off unsuccessful analysis.
In this presentation, a modified FA flow is demonstrated through 5 FA examples solved thanks to X-ray MicroCT.
Construction Analysis flow is not modified, but a set of measurements are enabled by X-ray MicroCT. Examples are reported.
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STD FA flow (package failures) Electrical Failure
Non-destructive package Analysis NO
No iterations are possible, because the sample is destroyed
Conclusive
Fault Isolation
Problem Found
Physical Analysis (d (destructive) i )
Conclusive NO No Defect Found
YES
YES
Additional Physical Characterizations FA report
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CT-based FA flow (package failures) Electrical Failure
Non-destructive package Analysis NO
Conclusive
Fault Isolation CT-based physical p y analysis
Problem Found
Physical Analysis (NON destructive) d i )
NO Iterations are p possible, because sample is intact
Conclusive
YES
YES
Additional Physical Characterizations FA report
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CT-based FA flow (package failures) Non-destructive package analysis methods: External Visual/SEM inspection, 2D xrays, C-SAM, T-SAM
Package-level Fault Isolation methods: TDR (Ope (Opens/Shorts), s/S o s), Thermography e og ap y (S (Shorts), o s), Magnetic ag e c Field e d (S (Shorts) o s)
Package-level Physical Analysis methods (destructive): S Sample l decapsulation, d l ti P ll l deprocessing, Parallel d i L Laser/Chemical /Ch i l deprocessing, Mechanical X-section, FIB X-section
Package-level Physical Analysis methods (nondestructive): X-ray Computed Tomography
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FA Case 1: wire proximity Failure Symptom: short circuit between B40 and A44
Bonding A44
Bonding A39
Bonding A38
Bonding D1 Bonding A1
2D analysis shows an image that is not conclusive, because it is not easy to understand the various bonding height.
FA Case 1: wire proximity 2 mils wire
A44 B40 1.2 mils wire
X-ray MicroCT showed a problem of wire proximity on the involved signals
FA Case 1: wire proximity
Virtual X X-Section Section analysis shows that those wires are very close for a significant length This result is compatible with 1.5KOhm resistance measured d
FA Case 2: passive soldering defects Thermally Enhanced Flip Chip BGA 45 mm x 45 mm, more than 2000 BGA balls Failure Symptom: suspected problems on inpackage passive networks
45mm
X-ray MicroCT highlighted a fi crackk in fine i the th soldering. ld i
line of the fracture
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FA Case 2: passive soldering defects Virtual X-section revealed that many voids (not visible from SEM inspection) are present inside the soldering. Voids number and dimensions (volume, (volume not projection) can be quantitatively analyzed, and eventually correlated with crack formation.
void
voids cracks/voids
cracks/voids
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FA Case 3: flip chip bump defects TDR
Failure Symptom: open signal in flip chip with lead-free bumping Virtual X-Section (non-destructive)
Failure electrically detected at signal bump. It It is likely to be located at bump level, not ball level. Exact location is uncertain
Possible crack found to g Xbe the cause using ray MicroCT.
FIB Cross Section (destructive)
Void and crack confirmed by FIB/SEM 12
FA Case 4: copper wire fine crack Failure Symptom: increased series resistance on power line
No evidence of problems at X-rays 2D
X-ray MicroCT put in evidence a fine crack on the suspected wires 13
FA Case 4: copper wire fine crack Copper wire failure after 700hrs HTOL
3.a
3.b
thinning of wire
crack
From X-ray y MicroCT (non destructive) to FIB Cross Section (destructive) 14
FA Case 5: copper pillar wettability Failure Symptom: open signal on flip chip with copper pillar O Open signal i l No evidence of problems at X-rays 2D
DIE X-ray MicroCT put in evidence poor soldering on the suspected signal SUBSTRATE 15
FA Case 5: copper pillar wettability Failing Cu pillar with visible lack of soldering
ttrace s
Virtual x-section orthogonal to trace trace. Comparison with good pillar.
x-section of the copper pillar in the proximity of the trace confirms the open
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Flow for package characterization Good sample
Non-destructive package Analysis
Nonconformities report
Destructive D t ti package Analysis
Nonconformities N f iti report
Final CA report
List of std flow: Visual Mechanical Warpage Xray (2D) CT-enabled measurements: CSAM Wire loop p measurements ((all X-section X section wires) Decap and internal inspection Wire to wire distances (all wires) Ball shear (WB devices only) Bump void quantitative Pull test ((WB devices only) y) measurement (all bumps inside Cratering test (WB devices only) specific area) Solderability Solder Ball shear (BGA only) Substrate backside polishing (BGA only) 17
CA Case 1: wire loop characterization
On a good typical sample with complex wire bonding, it is possible to characterize the package critical dimensions.
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CA Case 1: wire loop characterization Typical package measurementes: t a. Loop highest point vs top p p of resin b. Die thickness c Glue fillet height c.
3D advantage : this measurement is not obtainable with any other th destructive d t ti or nondestructive d t ti techniques. t h i 19
CA Case 1: wire loop characterization Single wire loop characterization (distances and angles).
3D advantage : this measurement is not obtainable with any other th destructive d t ti or nondestructive d t ti techniques. t h i 20
CA Case 1: wire loop characterization Wire to wire minum distances distances.
3D advantage : this measurement is not obtainable with any other th destructive d t ti or nondestructive d t ti techniques. t h i 21
CA Case 2: flip chip bumps Quantitative characterization of flip-chip bump voiding is possible, thanks to volume reconstruction, virtual cross section and virtual slicing. slicing
X-section view
Bump to die interface
Bump to substrate interface
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CA Case 2: flip chip bumps 2D vs 3D: the voids are not even visible in 2D
2D projection image
3D slice of reconstructed volume l 23
CA Case 3: 3D chip with TSVs Through-silicon via (TSV) is a vertical electrical connection (via) passing completely through a silicon wafer or die. TSV technology is important in creating 3D packages and 3D integrated circuits. Metal l layers TSV
Si bulk Copper pillars
PCB layers
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CA Case 3: 3D chip with TSVs Visualization and inspection of Copper Pillars and Through Silicon Vias by X-ray X ray MicroCT.
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CA Case 3: 3D chip with TSVs Mechanical X-section
Virtual X-section
Metal layers
Metal layers
TSV
Si bulk
Copper pillar ill
PCB layers
Si bulk
TSV
Copper pillar
PCB layers
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CA Case 3: 3D chip with TSVs Detection of partially filled TSVs is made possible in non nondestructive way, even if the device is electrically good
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CA Case 4: MEMs Compass module with 5 dies assembled together, MEMS+ASIC MEMS ASIC for the 3-axes 3 axes accelerometer and 2 sensor dies+ASIC for the 3-axes magnetometer. magnetometer
Example a peo of de defectiveness: ect e ess die attach bleeding 28
CA Case 4: MEMs Microphone
Bulk silicon device
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Conclusions Xray Computed Tomography demonstrated as a valuable methodology for: Improving effectiveness of FA flow Enlarging measurable characteristics in the Package Characterization flow Visualization of hidden structures in 3D chips and MEMs devices Enabling visualization of a variety of complex packages and systems
Limitations: Long acquisition times vs Best Resolution No handling of trays (limitation for production environment) 30
Acknowledgements The authors would like to thank: Sylvain Dudit (STMicroelectronics France) for having provided the TSV sample Audrey Garnier (STMicroelectronics Italy) for having provided the MEMS samples Davide Caccialanza, Alessandra Fudoli, Paolo Monti (STMicroelectronics Italy) for the time spent during data acquisition
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