®
MCM2114 MCM21L14
MOTOROLA
4096-BIT STATIC RANDOM ACCESS MEMORY The MCM2114 is a 4096-bit random access memory fabricated with high density, high reliability N-channel silicon-gate technology. For ease of use, the device operates from a single power supply, is directly compatible with TTL and DTL, and requires no clocks or refreshing because of fully static operation. Data access is particularly simple, since address setup times are not required. The output data has the same polarity as the input data. The MCM2114 is designed for memory applications where simple interfacing is the design objective. The MCM2114 is assembled in 18-pin dual-in-line packages with the industry standard pin-out. A separate chip select (8) lead allows easy selection of an individual package when. the three-state outputs are 0 R-tied. The MCM2114 series has a maximum current of 100 mAo Low power versions (i.e., MCM21 L14 series) are available with a maximum current of only 70 mAo •
MOS IN-CHANNEL, SILICON-GATE)
4096·BIT STATIC RANDOM ACCESS MEMORY
~ ~ ~ ~ ~ p~snc ij
1024 Words by 4-Bit Organization
•
Industry Standard 18-Pin Configuration
•
Single +5 Volt Supply
•
No Clock or Timing Strobe Required
•
Fully Static: Cycle Time = Access Time
•
Fully TTL/DTL Compatible
•
Common Data Input and Output
•
Three-State Outputs for OR-Ties
•
Low Power Version Available
200 ns
MCM2114-25 MCM21 L14-25
250 ns
CERAMIC PACKAGE CASE 680
PIN ASSIGNMENT
A6
MCM2114-30 MCM21 L 14-30
300 ns
MCM2114-45 MCM21L14-45
450 ns
2
17
A7
A4
3
16
A8
A3
4
15
A9
14
1/01
13
1/02
12
1/03
11
1/04
10
IN
Al
15 Vec = Pin 18
A4
Vss=Pin9
A5 1 A6 A7
17 16
Row Select
'r~l"
Vcc
A5
AO A9
PACKAGE
)~'X
MAXIMUM ACCESS TIME/MINIMUM CYCLE TIME MCM2114-20 MCM21L14-20
PSUFFIX
CASE 707
A2
'L
Memory Array
S
64 Row , 64 Columns
VSS 9
BLOCK DIAGRAM
-----.J
A8
/101 1102
14 13
PIN NAMES AO-A9
W S 1101-1/04 Vee VSS
2-3
Address Input Write Enable Chip Select Data I nputlOutput Power (+5 V) Ground
II
MCM2114, MCM21 L 14
ABSOLUTE MAXIMUM RATINGS (See Note 1) Rating Temperature Under Bias
Unit
°c
inputs against damage due to high static voltages
This device contains circuitry to protect the
-0.5 to +7.0
Vdc
or electric fields; however, it is advised that
DC Output Current
5.0
mA
normal precautions be taken to avoid applica· tion of any voltage higher than maximum rated
Power Dissipation
1.0
Watt
o to +70
°c °c
Voltage on Any Pin With Respect to VSS
I
Value -10to+80
Operating Temperature Range Storage Temperature Range
-65 to +150
voltages to this high-impedance circuit.
Note: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS (T A
=0° to 70°C,
Vee
=5.0V ±5%,
unless otherwise noted.)
RECOMMENDED DC OPERATING CONDITIONS MCM2114 Parameter
MCM21 L 14 Max
Unit
III
10
10
}1A
IILOI
10
10
}1A
95
65
mA
100
70
mA V
Symbol
Input Load Current
Min
Nom
Max
Min
Nom
(All Input Pins, Yin = 0 to 5.5 V) I/O Leakage Current (S= 2.4 V, VIIO'=O.4 V to VCC) Power Supply Current
80
ICCl
(Vin ~ 5.5,11/0 = 0 mA, T A = 25 0 C) Power Supply Cur.rent
ICC2
(Vin = 5.5 V, 11/0 = 0 mA, TA = OoC) I nput Low Voltage
VIL
-0.5
0.8
-0.5
0.8
Input High Voltage
VIH
2.0
6.0
2.0
6.0
Output Low Current
10L
2.1
2.1
6.0
V mA
6.0
VOL =O.4V Output High Current
10H
-1.4
-1.0
-1.4
-1.0
mA
40
mA
VOH = 2.4 V lOS (2)
Output Short Circuit Current
40
Note: 2. Duration not to exceed 30 seconds.
CAPACITANCE (f = 1 .0 MHz, T A = 25°C, periodically sampled rather than 100% tested.) Characteristic
Unit
Symbol
Max
Cin
5.0
pF
CliO
5.0
pF
Input Capacitance (V in = 0 V) Input/Output Capacitance (VI/O = 0 V)
AC OPERATING CONDITIONS AND CHARACTERISTICS (Full operating voltage and tem'perature unless otherwise noted.)
Input Pulse Levels . . .
0.8 Volt to 2.4 Volts
Input Rise arid Fall Times ..
10 ns
Input and Output Timing Levels
1.5 Volts
Output Load.
1 TTL Gate and CL = 100 pF
2-4
MCM2114, MCM21 L 14
AC OPERATING CONDITIONS AND CHARACTERISTICS Read (Note 3). Write (Note 4) Cycles RECOMMENDED AC OPERATING CONDITIONS
(TA 0·0 to 70°C, Vee = 5.0 V
Parameter
Symbol
Min
tRC
200
Read Cycle Time
± 5%)
MCM2114-25 MCM21 L 14-25
MCM2114-20 MCM211.14-20 Max
Max
Min
MCM2114-45 MCM2114-30 MCM21 L 14-30 MCM21 L 14-45 Min
Max
Min
Max
Units ns
450
300
250
tA
200
250
300
450
ns
Chip Selection to Output Valid
tso
70
85
100
120
ns
Chip Selection to Output Active
tsx
Access Time
---_._---------
70
ns
20
20
20
20
100
80
ns
Output 3·State From Oeselection
tOTO
Output Hold From Address Change
tOHA
50
50
50
50
ns
twe
200
250
300
450
ns
tw
120
135
150
200
ns
Write Cycle Time Write Time Write Release Time
60
---_._.._-_._._-----_.
0
0
tWR
70
100
Output 3-State From Write
tOTW
Data to Write Time Overlap
tow
120
135
150
200
ns
tOH
0
0
0
0
ns
60
80
-----------~-
Data Hold From Write Time Notes:
3. A Read occurs during the overlap of a low S and a high W. 4. A Write occurs during the overlap of a low S and a low W. READ CYCLE TIMING (Note 5)
WRITE CYCLE TIMING (Notes 6 and 7)
- - - - - twe Address Il.ddress
DOllt
-----.-j
__JI~------------------------JI'----_
-----------+--JI'------
__J~____- - - -__
------------~---__1~===~ Note: 5.
W is
high for a Read cycle.
Notes:
6. If the S low transition occurs simultaneously with the W low transition, the output buffers remain in a high-impedance state. 7.
IN
must be high during all address transitions.
WAVEFORMS Input
Output
MUST BE
WILL BE VALID
~
CHANGE FROM H TO L
WILL CHANGE FROM H TO L
-.!llll7
CH"'NGE FROM LTD H
WILL CHANGE FROM L TO H
~ON'T CARE ANY CHANGE PERMITTED
CHANGING STATE UNKNOWN
Waveform
Symbol
~
==>-
HIGH
IMPEDANCE
2-5
II
MCM2114, MCM21 L 14
TYPICAL CHARACTERISTICS SUPPL Y CURRENT versus SUPPLY VOLTAGE
SUPPL Y CURRENT versus AMBIENT TEMPERATURE
80
;;{
E
75
;;{
75
~
a:
::> u
70
--
~
~
~
70
~ ............
E
65
-
k-- fo-
~
--
~
- I i
~
.............. 65
.........
I'...... .............
60
~ ...............
--
55 -'-'-'
60
50 4.5
........
4.75 5.0 Vee, SUPPLY VOLTAGE (VOLTS)
5.25
5.5
OUTPUT SOURCE CURRENT versus OUTPUT VOLTAGE
o
20 40 TA, AMBIENT TEMPERATURE (Oe)
60
OUTPUT SINK CURRENT versus OUTPUT VOL TAGE
8.0
9.0
1\ 7.0
1\
\
I w u
a:
::>
5.0
6.0
E a: a:
~
4.0
~
3.0
2.0
~
1.0
2.0
4.0
~
0
3.0
2.0
\
1.0
'"
3.0 4.0 VOH, OUTPUT VOLTAGE (VOLTS)
5.0
o o
6.0
2-6
I
/
I !
I ,
/
""z
\
o
/
u;
\ 1.0
5.0
::> u
\ \ \ \
CJ)
~
« fZ
0
:i: E
7.0
\ \
;;{
E
8.0
\
6.0
80
I
I
I / 0.1
V
0.2 0.3 0.4 VvL, OUTPUT VOlTAGE (VO LTS)
0.5
0.6
MCM2114, MCM21 L 14 TYPICAL ACCESS TIME versus TEMPERATURE
NORMALIZED ACCESS TIME versus TEMPERATURE
1.0
/
! 0.95
/
- ;:: :E
§ 0.90
.... v
« 0.85
~
Z
/
:E
;::
~
/v 150
./
«
V
«
:J. 140
0.80
:J.
/
160
.... V
CI
~
/ --
/"
en
v
170
~
V
V
L
- ----t-o
0.7 5
o
20
130 20
80
60
40
40
TA, TEMPERATURE (DC)
60
80
TA, TEMPERATURE (DC)
MCM2114/MCM21 L14 BIT MAP PIN 18
Vee
PIN 1
o
D 1023 l1li(: 1007
1008 1023 l1li(: 1007
1/° 3 (PIN NO. 12)
1/° 4 (PIN NO.l1)
16 15
1008 1023 III: 1007
lilt
~ 15 III:
1008 1023 lilt 1007
1/° 1 (PIN NO. 14)
16 0 15
1/° 2 (PIN NO. 13)
16 0 15
l1li(:
1008
16
III:
0
To determine the precise location on the die of a word in memory, reassign address numbers to the address pins as in the table below. The bit locations can then be determined directly from the bit map.
PIN NUMBER 2
3 4 5
REASSIGNED ADDRESS NUMBER
PIN NUMBER
A6 A5 A4 A3 AD
6 7 15 16
17
2-7
REASSIGNED ADDRE-SS NUMBER Al A2
AS AS A7
90
•
