UM2333 - Matthieu Benoit

Features. • Access time 250/350/450ns (max.) • Single +5V ±1 0% power supply. • TT L compatible inputs and outputs. • Three-state outputs. General Description.
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.(l)UMC

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UM2333 4K x 8 NMOS ROM

Features •

Pin compatible with 2732 EPROM

Single +5V ±1 0% power supply



Two programmable chip selects for output control

TT L compatible inputs and outputs



N-channel silicon gate technology



Access time 250/350/450ns (max.)

• • •

Three-state outputs

General Description The UM2333 is a 32,768-bit static MOS read only memory organized as 4096 words by 8 bits.

Programming of the device is accomplished by a custom

The device is com-

masking process.

The UM2333 is designed for memory

pletely static in operation, and operates from a single

applications where high performance, large bit storage,

+5V power supply. All inputs and outputs are TT L com-

and simple interfacing are important design objectives.

patible.

The two chip select inputs are programmable.

Pin Configuration

Block Diagram

vcc Au A7

VCC

A6

As

As

A9

A4

All

A3

CS1/CS1

A2

AlO

A1

CS2/CS2

Ao

07

00

06

01

Os

02

04

GND

03

Ao

GND

ADDRESS INPUT BUFFER X DECODER

32.768 BIT CELL MATRIX

1-6

Y

DECODER

y

CATING

OUTPUT ENABLE LOGIC

OUTPUT BUFFER

-

CS1/CS1

-

CS2/CS2

00 01 02 03 04 Os 06 07

eUMC

UM2333

Absolute Maximum Ratings*

*Comments o

Ambient temperature under bias, TA ..... -10 to +80 C

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability.

o

Storage temperature, T STG ........... -65 to +150 C Applied voltage on any pin with respect to ground . . . . . . . . . . . . . . . . . -0.5 to +7V Power dissipation, PD . . . . . . . . . . . . . . . . . . . . . 1.0W

D.C. Electrical Characteristics (TA = 0 to 70°C, Vee = 5V ± 10% unless otherwise specified)

Limits Symbol

Parameter

Test Conditions

Units Min.

Typ.

Max.

VIL

Input low voltage

-.05

0.8

VIH

Input high voltage

2.0

Vee

V

VOL

Output low voltage

IOL =2.1mA

0.4

V

VOH

Output high voltage

IOH = -400J.LA

Vee

V

III

I nput load cu rrent

V 1N = Vee = 5.25V

10

J.LA

I LO

Output leakage current

V OUT = Vee = 5.25V

10

J.LA

100

mA

ICC

2.4

. Vee current

Capacitance (TA = 25°C

f = 1.0 MHz)

Limits Symbol

Parameter

Unit

Test Conditions Typ.

C1N COUT

Input capacitance Output capacitance

All pins except pin under tied to AC ground

Note: This parameter is periodically sampled and is not 100% tested.

1-7

Max. 7

pF

10

pF

UM2333 A.C. Electrical Characteristics (TA

= 0 to 70°C,

Vcc

= 5V±

10%) UM2333

UM2333-1

UM2333-2 Unit

Parameter

Symbol

Min.

Max.

Min.

Max.

Min.

Max.

Address access time 1

450

350

250

ns

tco

Output enable delay from CSl/CSl or CS 2 /CS 2

150

120

120

ns

tDF

Output disable delay from CSt/CSt or CS 2 /CS 2

0

100

ns

tOH

Output hold from address change

10

tACC

100

0

100

10

0

10

ns

Test Conditions Output load .............. 1 TTL load and 100pF I nput transition time . . . . . . . . . . . . . . . . . . . . . 20ns

Timing reference levels . . . . . . . . . . . . . . . . . . . . . . . . ............. Input = 1.5V, Output = 0.8V and 2.0V

Timing Diagram

ADDRESS INPUTS

VALID

tACC

CHIP SELECT INPUTS

-1

INVALID

VALID

teo

OUTPUTS HIGH IMPEDANCE

1

/ - tDF

-

VALID

-

Ordering Information Part Number

Access Time

~

Package

UM2333

450ns

Plastic

UM2333-1

350ns

Plastic

UM2333-2

250ns

Plastic

1-8

r-