Binary or BCD representation of time, calendar, and alarm. § 12-hour or 24-hour clock with AM and PM in 12-hour mode. § Daylight Savings Time option.
Drop-in replacement for IBM AT computer clock/calendar Pin compatible with the MC146818B and DS1287A Totally nonvolatile with over 10 years of operation in the absence of power Self-contained subsystem includes lithium, quartz, and support circuitry Counts seconds, minutes, hours, days, day of the week, date, month, and year with leapyear compensation valid up to 2100 Binary or BCD representation of time, calendar, and alarm 12-hour or 24-hour clock with AM and PM in 12-hour mode Daylight Savings Time option Selectable between Motorola and Intel bus timing Multiplex bus for pin efficiency Interfaced with software as 128 RAM locations – 14 bytes of clock and control registers – 114 bytes of general-purpose RAM Programmable square-wave output signal Bus-compatible interrupt signals (IRQ) Three interrupts are separately softwaremaskable and testable – Time-of-day alarm once/second to once/day – Periodic rates from 122ms to 500ms – End-of-clock update cycle Underwriters Laboratory (UL) recognized
MOT N.C. N.C. AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC SQW NC RCLR N.C. IRQ RESET DS N.C. R/W AS CS
DS12887A 24 PDIP Module (700mil)
Package Dimension Information http://www.maxim-ic.com/TechSupport/DallasPackInfo.htm
PIN DESCRIPTION AD0–AD7 - Multiplexed Address/Data Bus N.C. - No Connect MOT - Bus Type Selection CS - RTC Chip-Select Input AS - Address Strobe - Read/Write Input R/ W DS - Data Strobe RESET - Reset Input IRQ - Interrupt Request Output SQW - Square-Wave Output VCC - +5V Main Supply RCLR - RAM Clear GND - Ground
ORDERING INFORMATION PART PIN-PACKAGE DS12887A 24 PDIP Module
TOP MARK DS12887A
TEMP RANGE 0°C to +70°C
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: http://www.maxim-ic.com/errata.
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073102
DS12887A
DESCRIPTION The DS12887A real-time clock plus RAM is designed to be a direct replacement for the DS1287A. The DS12887A is identical in form, fit, and function to the DS1287A, and includes additional 64 bytes of general-purpose RAM. Access to this additional RAM space is determined by the logic level presented on AD6 during the address portion of an access cycle. The RCLR pin is used to clear (set to logic 1) all 114 bytes of general-purpose RAM but does not affect the RAM associated with the real-time clock. In order to clear the RAM, RCLR must be forced to an input logic 0 (-0.3V to +0.8V) during battery-backup mode when VCC is not applied. The RCLR function is designed to be used by human interface (shorting to ground manually or by switch) and not to be driven with external buffers. For a complete description of operating conditions, electrical characteristics, bus timing and pin descriptions other than RCLR , refer to the DS12887 data sheet. Note: Pins 2, 3, 16, 20, and 22 are missing by design. This device cannot be stored or shipped in conductive material that will give a continuity path between the RAM clear pin and ground.
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Features. ⢠Access time 250/350/450ns (max.) ⢠Single +5V ±1 0% power supply. ⢠TT L compatible inputs and outputs. ⢠Three-state outputs. General Description.
the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the ...
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It multiplexes 14 bits of system supplied address to 7 output address pins. The device also .... Exposure to absolute maximum rating conditions for extended ...