EUFANET Workshop – ESREF 2012 Finding opens : EBC technique Sylvain Dudit - STMicroelectronics Crolles Antoine Reverdy – Sector Technologies

Introduction – Problem statement • Finding opens at die level is a challenge which is gets even more complex with technology node progress • Global fault isolation techniques can provide useful data, but rarely a direct pointing of open failures. • Node becoming smaller and interconnects more complex, precise localization matters even more to be able to find the physical defect • We will present the Electron Beam Altered Current (EBAC) techniques as an interesting and accurate mean of detecting/confirming opens inside back end of die.

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Outline • Problem statement • Analysis flow and EBC techniques vs technology node • EBAC/RCI technique overview • Case study 1 : back end test structures • Case study 2 : real case on 32nm Product • Conclusion/Perspectives

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Flow : >45nm technology node • Gates are in polySi, • Density and dimensions allow SEM analysis (X-section), • PA can be done from a GFI tool Electrical fail

Global Fault Isolation techniques (LIT, EMMI, OBIRCh, SDL ,LVx, TFI, VC, etc)

Timing Analysis (if suitable)

Physical Analysis (mainly SEM X-section)

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Flow :