Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
PHX4N60E
FEATURES
SYMBOL
• Repetitive Avalanche Rated • Fast switching • Stable off-state characteristics • High thermal cycling performance • Isolated package
QUICK REFERENCE DATA d
VDSS = 600 V ID = 2.4 A
g
RDS(ON) ≤ 2.5 Ω s
GENERAL DESCRIPTION
PINNING
N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications.
PIN
SOT186A DESCRIPTION case
1
gate
2
drain
3
source
case
isolated
The PHX4N60E is supplied in the SOT186A full pack, isolated package.
1 2 3
LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDSS VDGR VGS ID
Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current
Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
IDM PD Tj, Tstg
Pulsed drain current Total dissipation Operating junction and storage temperature range
- 55
600 600 ± 30 2.4 1.5 18 35 150
V V V A A A W ˚C
MIN.
MAX.
UNIT
-
295
mJ
-
9
mJ
-
4.5
A
Ths = 25 ˚C; VGS = 10 V Ths = 100 ˚C; VGS = 10 V Ths = 25 ˚C Ths = 25 ˚C
AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS
EAR IAS, IAR
CONDITIONS
Non-repetitive avalanche energy
Unclamped inductive load, IAS = 3.2 A; tp = 0.24 ms; Tj prior to avalanche = 25˚C; VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer to fig:17 Repetitive avalanche energy1 IAR = 4.5 A; tp = 2.5 µs; Tj prior to avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V; refer to fig:18 Repetitive and non-repetitive avalanche current
1 pulse width and repetition rate limited by Tj max. December 1998
1
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
PHX4N60E
ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 ˚C unless otherwise specified SYMBOL
PARAMETER
CONDITIONS
Visol
R.M.S. isolation voltage from all three terminals to external heatsink
f = 50-60 Hz; sinusoidal waveform; R.H. ≤ 65% ; clean and dustfree
Cisol
Capacitance from T2 to external f = 1 MHz heatsink
MIN.
TYP.
-
-
10
MAX.
UNIT
2500
V
-
pF
THERMAL RESISTANCES SYMBOL PARAMETER
CONDITIONS
Rth j-hs
with heatsink compound
Rth j-a
Thermal resistance junction to heatsink Thermal resistance junction to ambient
MIN.
TYP. MAX. UNIT
-
-
3.6
K/W
-
55
-
K/W
ELECTRICAL CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER
CONDITIONS
MIN.
V(BR)DSS
VGS = 0 V; ID = 0.25 mA
600
-
-
V
VDS = VGS; ID = 0.25 mA
-
0.1
-
%/K
2.0 2 -
2.1 3.0 3.4 2 50 10
2.5 4.0 100 500 200
Ω V S µA µA nA
Drain-source breakdown voltage ∆V(BR)DSS / Drain-source breakdown ∆Tj voltage temperature coefficient RDS(ON) Drain-source on resistance VGS(TO) Gate threshold voltage gfs Forward transconductance IDSS Drain-source leakage current
TYP. MAX. UNIT
IGSS
VGS = 10 V; ID = 2.25 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 2.25 A VDS = 600 V; VGS = 0 V VDS = 480 V; VGS = 0 V; Tj = 125 ˚C Gate-source leakage current VGS = ±30 V; VDS = 0 V
Qg(tot) Qgs Qgd
Total gate charge Gate-source charge Gate-drain (Miller) charge
ID = 4.5 A; VDD = 480 V; VGS = 10 V
-
48 4 24
60 6 30
nC nC nC
td(on) tr td(off) tf
Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time
VDD = 300 V; RD = 68 Ω; RG = 12 Ω
-
12 33 82 36
-
ns ns ns ns
Ld Ls
Internal drain inductance Internal source inductance
Measured from drain lead to centre of die Measured from source lead to source bond pad
-
4.5 7.5
-
nH nH
Ciss Coss Crss
Input capacitance Output capacitance Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
600 80 46
-
pF pF pF
December 1998
2
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
PHX4N60E
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER
CONDITIONS
IS
Ths = 25˚C
-
-
4.5
A
Ths = 25˚C
-
-
18
A
VSD
Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage
IS = 4.5 A; VGS = 0 V
-
-
1.2
V
trr Qrr
Reverse recovery time Reverse recovery charge
IS = 4.5 A; VGS = 0 V; dI/dt = 100 A/µs
-
480 4
-
ns µC
ISM
December 1998
MIN.
3
TYP. MAX. UNIT
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
Normalised Power Derating
PD%
120
PHX4N60E
10
with heatsink compound
110
PHX2N60
Zth j-hs, Transient thermal impedance (K/W) D = 0.5
100 90
1 0.2
80 70 60
0.1
0.1 0.05 0.02
50 40 30
PD
0.01
20
t D= p T
tp
single pulse
10
t
T
0 0
20
40
60
80 Ths / C
100
120
0.001 1us
140
Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Ths)
12
1s
100ms
ID, Drain current (Amps)
PHP3N60
Tj = 25 C
with heatsink compound
110
100us 1ms 10ms tp, pulse width (s)
Fig.4. Transient thermal impedance. Zth j-hs = f(t); parameter D = tp/T
Normalised Current Derating
ID%
120
10us
100 90
10
80 70
8
60
6
7V
10 V 6V 5.5 V
50 40
5V
4
30 20
VGS = 4.5 V
2
10 0 0
20
40
60
80 Ths / C
100
120
0
140
Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Ths); conditions: VGS ≥ 10 V
100
ID, Drain current (Amps)
= N)
VD
PHX2N60
10 15 20 25 VDS, Drain-Source voltage (Volts)
30
/ID
PHP3N60
RDS(on), Drain-Source on resistance (Ohms) 4.5 V VGS = 5 V
6 5
Tj = 25 C
5.5 V
tp = 10 us
O
S(
5
Fig.5. Typical output characteristics. ID = f(VDS); parameter VGS
S
10
0
4
RD
100 us
1
6V 3
1 ms DC
10 ms
10 V
2
100 ms
0.1
1
0.01
1
10 100 1000 VDS, Drain-source voltage (Volts)
0
10000
Fig.3. Safe operating area. Ths = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp
December 1998
0
2
4 6 8 ID, Drain current (Amps)
10
12
Fig.6. Typical on-state resistance. RDS(ON) = f(ID); parameter VGS
4
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
PHX4N60E
ID, Drain current (Amps)
12
VGS(TO) / V
PHP3N60
VDS > ID x RDS(on)max
max.
4
10 typ.
3
8
min.
6
2
4 1
Tj = 150 C 2 Tj = 25 C 0
0
0
2 4 6 VGS, Gate-Source voltage (Volts)
8
-60
10
gfs, Transconductance (S)
-20
0
20
40 60 Tj / C
80
100
120
140
Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS
Fig.7. Typical transfer characteristics. ID = f(VGS); parameter Tj
6
-40
PHP3N60
1E-01
SUB-THRESHOLD CONDUCTION
ID / A
VDS > ID x RDS(on)max
5
1E-02
Tj = 25 C 4
150 C
2%
1E-03
typ
98 %
3 1E-04
2 1E-05
1 0
1E-06
0
2
4 6 ID, Drain current (A)
8
0
10
Fig.8. Typical transconductance. gfs = f(ID); parameter Tj
2 VGS / V
3
4
Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Normalised RDS(ON) = f(Tj)
a
1
1000
PHP3N60
Junction capacitances (pF) Ciss
2
100
1
Coss Crss
0 -60
-40
-20
0
20
40 60 Tj / C
80
10
100 120 140
Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 2.25 A; VGS = 10 V
December 1998
1
10 100 VDS, Drain-Source voltage (Volts)
1000
Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
5
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
15
PHX4N60E
VGS, Gate-Source voltage (Volts)
PHP3N60
20
ID = 4.5 A Tj = 25 C
PHP3N60
IF, Source-Drain diode current (Amps) VGS = 0 V
240 V
15 120 V
10
VDD = 480 V
10 150 C
Tj = 25 C
5
5
0
0
10
20
30 40 50 Qg, Gate charge (nC)
60
0
70
0.2
0.4 0.6 0.8 1 VSDS, Source-Drain voltage (Volts)
1.2
1.4
Fig.16. Source-Drain diode characteristic. IF = f(VSDS); parameter Tj
Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); parameter VDS
1000
0
PHP3N60
Switching times (ns) VDD = 300 V VGS = 10 V RD = 68 Ohms Tj = 25 C
Non-repetitive Avalanche current, IAS (A)
10
25 C Tj prior to avalanche = 125 C
100
1
td(off)
VDS
tf
tp
tr
10
ID
0.1 1E-06
td(on) 0
10
20 30 40 RG, Gate resistance (Ohms)
50
1E-05
60
1E-04
1E-03
1E-02
Avalanche time, tp (s)
Fig.14. Typical switching times; td(on), tr, td(off), tf = f(RG)
1.15
PHP4N60E
Fig.17. Maximum permissible non-repetitive avalanche current (IAS) versus avalanche time (tp); unclamped inductive load
Normalised Drain-source breakdown voltage V(BR)DSS @ Tj V(BR)DSS @ 25 C
10
1.1
Maximum Repetitive Avalanche Current, IAR (A) Tj prior to avalanche = 25 C
1.05
1 1
125 C 0.1
0.95 0.9 0.85 -100
PHP4N60E 0.01 1E-06 -50
0 50 Tj, Junction temperature (C)
100
150
1E-04
1E-03
1E-02
Avalanche time, tp (s)
Fig.15. Normalised drain-source breakdown voltage; V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
December 1998
1E-05
Fig.18. Maximum permissible repetitive avalanche current (IAR) versus avalanche time (tp)
6
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
PHX4N60E
MECHANICAL DATA Dimensions in mm Net Mass: 2 g
10.3 max
4.6 max
3.2 3.0
2.9 max
2.8
Recesses (2x) 2.5 0.8 max. depth
6.4 15.8 19 max. max.
15.8 max
seating plane
3 max. not tinned 3 2.5 13.5 min. 1 0.4
2
3
M
1.0 (2x) 0.6 2.54
0.9 0.7
0.5 2.5
5.08
1.3
Fig.19. SOT186A; The seating plane is electrically isolated from all terminals. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8".
December 1998
7
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors Avalanche energy rated
PHX4N60E
DEFINITIONS Data sheet status Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification
This data sheet contains final product specifications.
Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
December 1998
8
Rev 1.200
