Marconi Applied Technologies CCD55-30 High Performance CCD

Pixel readout frequency . . . . . 20 ± 7 000 ... generated by X-ray photons of known energy. 5. ... correlated double sampling) with a 10 ms integration period. 6.
119KB taille 0 téléchargements 219 vues
Marconi Applied Technologies CCD55-30 High Performance CCD Sensor FEATURES *

1242 (H) by 1152 (V) Pixel Format

*

28 by 26 mm Active Area

*

Visible Light and X-Ray Sensitive

*

New Improved Very Low Noise Amplifier for Slow-Scan Systems and Large Signal Amplifier for Binned Operation

*

Symmetrical Anti-Static Gate Protection

*

Radiation Tolerant

*

Gated Dump Drain on Output Register

INTRODUCTION The CCD55-30 is one of the CCD55 range of very large area CCD image sensors primarily intended to suit the requirements of astronomy, medical diagnostic and scientific measuring instruments. Standard three-phase clocking and buried channel charge transfer are employed. The readout register has a high performance low noise amplifier at one end for slowscan applications and a high speed amplifier at the other end. The image area is split into two sections which can be clocked separately for frame transfer operation. The CCD55-30 is an upgraded version of the CCD05-30 with improved output amplifiers and is also available in backthinned format. The CCD55-30 is pin compatible with the CCD05-30, except that the top two amplifiers are not provided. The CCD55-30 scientific image sensor is primarily specified for operation in a full-frame imaging mode with slow-scan readout from the whole image area through the low noise amplifier and is tested at a temperature of approximately 243 K. Other operating modes are also possible, including use of the large signal amplifier (but at higher noise) and pixel binning. Potential users are invited to discuss their applications with Marconi Applied Technologies to ensure optimum performance. In common with all other Marconi Applied Technologies CCD sensors, the CCD55-30 is available with a fibre-optic window or taper, a UV coating or a phosphor coating for hard X-ray detection. Designers are advised to consult Marconi Applied Technologies should they be considering using CCD sensors in abnormal environments or if they require customised packaging.

TYPICAL PERFORMANCE (Low noise amplifier) Pixel readout frequency . Output amplifier sensitivity Peak signal . . . . . Dynamic range . . . . Spectral range . . . . Readout noise (at 243 K, 20 Q.E. at 700 nm . . . . Peak output voltage . .

. . . . . . . . . . kHz) . . . .

. . . . . . . .

. 20 ± 7 000 kHz . . . . 3 mV/e7 . . . 450 ke7/pixel . 150 000:1 420 ± 1060 nm . . . . 3 e7 rms . . . 45 % . . . . 1.35 V

GENERAL DATA Format Image region (section A) . . Image region (section B) . . Image area (sections A + B) Pixel pitch (row and column)

. . . .

. 1252(H) x 576(V) pixels . 1252(H) x 576(V) pixels . . 28.17 x 25.92 mm . . 22.5 x 22.5 mm

Package Outline dimensions . . . . . Number of pins . . . . . . Inter-pin spacing . . . . . Inter-row spacing . . . . . Inner row spacing (across sensor) Window . . . . . . . . Mounting position . . . . .

. . . . . . .

. . . . . . .

. . . . . . .

. . . . . . .

53.3 x 33.0 mm . . . . 44 . . 2.54 mm . . 2.54 mm . . 43.18 mm removable glass . . . . any

Marconi Applied Technologies Limited, Waterhouse Lane, Chelmsford, Essex CM1 2QU England Telephone: +44 (0)1245 493493 Facsimile: +44 (0)1245 492492 e-mail: [email protected] Internet: www.marconitech.com Holding Company: Marconi p.l.c. Marconi Applied Technologies Inc. 4 Westchester Plaza, PO Box 1482, Elmsford, NY10523-1482 USA Telephone: (914) 592-6050 Facsimile: (914) 592-5148 e-mail: [email protected]

#2000 Marconi Applied Technologies Limited

A1A-CCD55-30 Issue 1, March 2000 411/5714

PERFORMANCE Min

Typical 450k

Max ±

e7/pixel

± ±

V V

65k

e7/pixel/s

± ±

% %

Peak charge storage (see note 1)

300k

Peak output voltage (unbinned): low noise amplifier large signal amplifier

± ±

Dark signal at 293 K (see notes 2 and 3)

±

Charge transfer efficiency (see note 4): parallel serial

± ±

Output amplifier sensitivity: low noise amplifier large signal amplifier

2.0 0.9

3.0 1.2

4.0 1.6

Readout noise at 243 K (see notes 3 and 5) (low noise amplifier, grade 0)

±

3

5

rms e7/pixel

Readout frequency (see note 6): low noise amplifier large signal amplifier

± ±

50 1000

7000 9000

kHz kHz

Response non-uniformity (std. deviation)

±

1

3

% of mean

Dark signal non-uniformity at 293 K (see notes 3 and 7) (std. deviation, s)

±

2000

5000

e7/pixel/s

Register and output node capacity relative to image section: towards low noise amplifier towards large signal amplifier

± ±

1.35 0.54 20k 99.9999 99.9993

mV/e7 mV/e7

2.0 4.0

± ±

Typical

Max

4.2

±

nF

±

pF

ELECTRICAL INTERFACE CHARACTERISTICS Min Electrode capacitances (measured at mid-clock level): A1 or B1 interphase

±

C1 interphase

±

110 13

A11, B11 to SS

±

A12, A13, B12, B13 to SS

±

±

nF

±

nF

C1, each phase to SS/DD/DG

±

135

±

pF

Low noise amplifier (A2) Large signal amplifier (A1)

±

400

±

O

±

250

±

O

8.4

Output impedances:

NOTES 1. Signal level at which resolution begins to degrade. 2. The typical average (background) dark signal at any temperature T (kelvin) between 230 and 300 K is given by: Qd/Qd0 = 122T3e76400/T where Qd0 is the dark current at 293 K. Note that this is typical performance and some variation may be seen between devices. Below 230 K additional dark current components with a weaker temperature dependence may become significant.

CCD55-30, page 2

3. This test is carried out on all CCD55-30 sensors. 4. CCD characterisation measurements made using charge generated by X-ray photons of known energy. 5. Measured using a dual-slope integrator technique (i.e. correlated double sampling) with a 10 ms integration period. 6. Readout above the values specified may be achieved but performance to the parameters given cannot be guaranteed. 7. Measured between 233 and 253 K, excluding white defects.

#2000 Marconi Applied Technologies

BLEMISH SPECIFICATION Traps

Slipped columns Black spots White spots

White column Black column

Pixels where charge is temporarily held. Traps are counted if they have a capacity greater than 200 e7 at 243 K. Are counted if they have an amplitude greater than 200 e7. 410% contrast at half saturation, 243 K. Are counted when they have a generation rate 10 times the specified maximum dark signal generation rate at 293 K (measured between 233 and 253 K). The typical temperature dependence of white spot blemishes is that of the average dark signal and is given by: Qd/Qd0 = 122T3e76400/T A column which contains at least 9 white defects. A column which contains at least 9 black defects.

GRADE

0

1

2

Column defects: black or slipped white

0 0

2 0

6 0

Traps 4200 e7

2

5

12

White spots

42

42

65

Black spots

20

40

200

Grade 5

Devices which are fully functioning but with image quality below that of grade 2 and which may not meet all other performance parameters. Minimum separation between adjacent black columns . . . . . . . . 50 pixels Note The effect of temperature on defects is that traps will be less noticeable at higher temperatures but more may appear below 243 K. The amplitude of white spots and columns will decrease rapidly with temperature.

#2000 Marconi Applied Technologies

CCD55-30, page 3

TYPICAL OUTPUT CIRCUIT NOISE

(Low noise amplifier, measured using clamp and sample)

NOISE EQUIVALENT SIGNAL (e7 r.m.s.)

10

7855

5

0 10k

50k

100k

500k

1M

FREQUENCY (Hz)

TYPICAL SPECTRAL RESPONSE (No window) 50

6908

45 40 35

QUANTUM EFFICIENCY (%)

30 25 20 15 10 5 0

400

500

600

700

800

900

1000

1100

WAVELENGTH (nm)

TYPICAL VARIATION OF DARK SIGNAL WITH SUBSTRATE VOLTAGE (Two I1 phases held low) 70

7872

60 50

DARK SIGNAL (k e7/pixel/s)

40 TYPICAL RANGE 30 20 10 0

0 1 2 3 SUBSTRATE VOLTAGE VSS (V)

CCD55-30, page 4

4

5

6

7

8

9

10

11

#2000 Marconi Applied Technologies

TYPICAL VARIATION OF DARK CURRENT WITH TEMPERATURE 105

7510

104

103

102

DARK CURRENT (e7/pixel/s)

10

1

1071

1072 780 760 PACKAGE TEMPERATURE (8C)

740

720

0

20

40

DEVICE SCHEMATIC The charge detection amplifier A1 is optimised for large signal, high speed operation, whereas amplifier A2 is optimised for very low noise under cooled slow-scan operation. 7856

1

44

IG

2

43

IG

DG

3

42

DG

4

41

5

40

6

39

7

38

ABD

SECTION A

ABD

37

1252 x 576 ELEMENTS

A13

8

36

A13

A12

9

35

A12

A11

10

34

A11

SS

11

33

SS

B11

12

32

B11

B12

13

31

B12

B13

14

30

B13

DD

15

OD1

16

29

DD

OS1

17

28

OD2

DOS1

18

27

OS2

RD1

19

26

RD2

1R1

20

25

1R2

C11

21

24

C12

OG

22

23

C13

SECTION B 1252 x 576 ELEMENTS A1

A2 SECTION C 1252 ELEMENTS

17 BLANK ELEMENTS

#2000 Marconi Applied Technologies

CCD55-30, page 5

CONNECTIONS, TYPICAL VOLTAGES AND ABSOLUTE MAXIMUM RATINGS PIN 1

REF

DESCRIPTION

±

No connection

PULSE AMPLITUDE OR DC LEVEL (V) (see note 8) Min Typical Max

MAXIMUM RATINGS with respect to VSS

±

±

±

±

2

IG

Isolation gate (see note 9)

75

0

1

+20 V

3

DG

Dump gate (see note 10)

75

0

1

+20 V

4

±

No connection

±

±

±

±

5

±

No connection

6

ABD

Anti-blooming drain (see note 11)

7

±

No connection

±

±

±

±

8

A13

Section A drive pulse

10

12

15

+20 V

9

A12

Section A drive pulse

10

12

15

+20 V

10

12

15

+20 V

0

9

10

±

10

12

15

+20 V

10

12

15

+20 V

±

±

±

±

20

22

25

70.3 to +25 V

10

A11

Section A drive pulse

11

SS

Substrate (see note 12)

12

B11

Section B drive pulse

13

B12

14

B13

Section B drive pulse

10

12

15

+20 V

15

DD

Dump drain

20

22

25

70.3 to +25 V

16

OD1

Output drains (A1)

27

29

30

70.3 to +30 V

17

OS1

Output transistor source (A1)

see note 13

70.3 to +30 V

18

DOS1

Dummy output source (A1)

see note 13

70.3 to +30 V

19

RD1

Reset transistor drain (A1)

20

1R1

Output reset pulse (A1)

21

C11

C register readout (see note 14)

22

OGC

C register output gate (A1 and A2)

23

C13

24 25

Section B drive pulse

15

17

19

70.3 to +25 V

8

12

15

+20 V

10

12

15

+20 V

1

3

5

+20 V

C register readout (see note 14)

10

12

15

+20 V

C12

C register readout (see note 14)

10

12

15

+20 V

1R2

Output reset pulse (A2)

8

12

15

+20 V

26

RD2

Reset transistor drain (A2)

17

22

70.3 to +25 V

27

OS2

Output transistor source (A2)

28

OD2

Output transistor drain (A2)

29

DD

Dump drain

30

B13

Section B drive pulse

31

B12

Section B drive pulse

32

B11

Section B drive pulse

33

SS

Substrate (see note 12)

0

9

10

±

34

A11

Section A drive pulse

10

12

15

+20 V

35

A12

Section A drive pulse

10

12

15

+20 V

10

12

15

+20 V

±

±

±

±

36

A13

Section A drive pulse

37

±

No connection

38

±

No connection

39

ABD

Anti-blooming drain (see note 11)

15

see note 15 27

70.3 to +30 V

29

30

70.3 to +30 V

20

22

25

70.3 to +25 V

10

12

15

+20 V

10

12

15

+20 V

10

12

15

+20 V

±

±

±

±

20

22

25

70.3 to +25 V

40

±

No connection

±

±

±

±

41

±

No connection

±

±

±

±

42

DG

Dump gate (see note 10)

75

0

1

+20 V

75

0

1

+20 V

±

±

±

±

43

IG

Isolation gate (see note 9)

44

±

No connection

CCD55-30, page 6

#2000 Marconi Applied Technologies

Voltages between pairs of pins:

pin 16 (OD1) to pin 17 (OS1) . . . . . . +15 V pin 16 (OD1) to pin 18 (DOS1) . . . . . +15 V pin 27 (OS2) to pin 28 (OD2) . . . . . . +15 V Current through OD1 . . . . . . . . . . 20 mA Current through any other source or drain pin . . 10 mA Operation at the typical voltages should give performance at, or close to, the specification limits. Some adjustment within the specified range may be required to optimise performance.

OUTPUT AMPLIFIER SCHEMATICS Low Noise (A2) RD2

C13

1R2

B13 (SEE NOTE 16)

7857

OD2

OG OS2

OUTPUT

EXTERNAL LOAD (SEE NOTE 17)

SS

SS

0V

Large Signal (A1) RD1

C13

1R1

B13 (SEE NOTE 16)

7858

OD1

OG OS1

EXTERNAL LOAD (SEE NOTE 18)

DOS1

SS

SS

OUTPUT

0V

NOTES 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18.

All image clock low levels 0 + 0.5 V. Other clock low levels + 1 V. Charge can be reverse clocked into the drain at the top of the device. During this period of clocking, VIG should be 12 + 2 V. Non-charge dumping level shown. For charge dumping, DG should be pulsed to 12 + 2 V. The device has no antiblooming but a drain bus is present above section A and must be biased to prevent charge injection. The isolation gate is between this bus and the first A11 electrode. The substrate voltage may need to be adjusted within the range indicated to achieve correct inverted mode operation. With a 7.5 mA constant current load, VOS = VRD + 6 V. Readout through amplifier 2 shown; for readout through amplifier 1, C11 and C12 should be interchanged. With a 5 mA constant current load, VOS = VRD + 6 V. The amplifier has a DC restoration circuit which is internally activated whenever B13 is high. Load not critical, can be 5 mA constant current supply or a 5 kO resisror. Load not critical, can be 7.5 mA constant current supply or a 3.3 kO resisror.

#2000 Marconi Applied Technologies

CCD55-30, page 7

FRAME READOUT TIMING DIAGRAM READOUT PERIOD 51152 CYCLES

SEE DETAIL OF LINE TRANSFER

7873

CHARGE COLLECTION PERIOD

I11 I12

I13 SEE DETAIL OF OUTPUT CLOCKING C11

C12

C13

1R

OUTPUT

FIRST VALID DATA

DETAIL OF LINE TRANSFER twi

7874

I11 1

toi

/3 Ti

I12

toi

tli

I13

tdri

tdir

C11

C12

C13

1R

Note

I11 = A11 + B11, I12 = A12 + B12, I13 =A13 + B13.

CCD55-30, page 8

#2000 Marconi Applied Technologies

DETAIL OF OUTPUT CLOCKING

7133B

C11 Tr

tor

C12

C13 twx

tdx

1R SIGNAL OUTPUT

OUTPUT VALID OS

RESET FEEDTHROUGH

LINE OUTPUT FORMAT SIGNAL OUTPUT 17 BLANK

*

*

*

17 BLANK

= Partially shielded transition elements

6445B

CLOCK TIMING REQUIREMENTS Symbol Ti twi tri tfi toi tli tdir tdri Tr trr tfr tor twx trx, tfx tdx

Description Image clock period Image clock pulse width Image clock pulse rise time (10 to 90%) Image clock pulse fall time (10 to 90%) Image clock pulse overlap Image clock pulse, two phase low Delay time, I1 stop to R1 start Delay time, R1 stop to I1 start Output register clock cycle period Clock pulse rise time (10 to 90%) Clock pulse fall time (10 to 90%) Clock pulse overlap Reset pulse width Reset pulse rise and fall times Delay time, 1R low to R13 low

Min 10 5 0.5 tri 3 2 3 1 150 10 trr 10 20 10 25

Typical

Max

30 15 2 2 5 5 5 2 see note 20 0.1Tr 0.1Tr 0.5trr 0.1Tr 0.5trr 0.5Tr

see note 19 see note 19 0.5toi 0.5toi 0.2Ti 0.2Ti see note 19 see note 19 see note 19 0.3Tr 0.3Tr 0.1Tr 0.2Tr 0.2Tr 0.8Tr

ms ms ms ms ms ms ms ms ns ns ns ns ns ns ns

NOTES 19. No maximum other than that necessary to achieve an acceptable dark signal at the longer readout times. 20. As set by the readout period.

#2000 Marconi Applied Technologies

CCD55-30, page 9

OUTLINE (All dimensions nominal) Not for inspection purposes 6617A

C B

D

A

E

PROTECTIVE GLASS WINDOW (SEE NOTE)

IMAGE PLANE

G H

Outline Note

F

Ref

Millimetres

A B C D E F G H

53.34 33.02 2.54 3.81 2.29 1.68 43.18 48.26

The device is normally supplied with a temporary glass window for protection purposes. It can also be supplied with a quartz or fibre-optic window where required.

PIN CONNECTIONS (View on Pins) PIN 1 IDENTIFIER

6612A

43

44

2

1

41

42

4

3

39

40

6

5

37

38

8

7

35

36

10

9

33

34

12

11

31

32

14

13

29

30

16

15

27

28

18

17

25

26

20

19

23

24

22

21

CCD55-30, page 10

#2000 Marconi Applied Technologies

ORDERING INFORMATION

HANDLING CCD SENSORS

Options include: *

Temporary Quartz Window

*

Temporary Glass Window

*

Fibre-optic Coupling

CCD sensors, in common with most high performance MOS IC devices, are static sensitive. In certain cases a discharge of static electricity may destroy or irreversibly degrade the device. Accordingly, full antistatic handling precautions should be taken whenever using a CCD sensor or module. These include:

*

UV Coating

*

Working at a fully grounded workbench

X-ray Phosphor Coating

*

Operator wearing a grounded wrist strap

Backthinned

*

All receiving socket pins to be positively grounded

*

Unattended CCDs should not be left out of their conducting foam or socket.

* *

For further information on the performance of these and other options, please contact Marconi Applied Technologies.

Evidence of incorrect handling will invalidate the warranty. All devices are provided with internal protection circuits to the gate electrodes (pins 2, 8, 9, 10, 12, 13, 14, 20, 21, 22, 23, 24, 25, 29, 30, 31, 32, 34, 35, 36, 42, 43) but not to the other pins.

HIGH ENERGY RADIATION Device parameters may begin to change if subject to an ionising dose of greater than 104 rads. Certain characterisation data are held at Marconi Applied Technologies. Users planning to use CCDs in a high radiation environment are advised to contact Marconi Applied Technologies.

TEMPERATURE LIMITS Min Typical Max Storage . . . . . . . . 73 ± 373 K Operating . . . . . . . . 73 243 323 K Operation or storage in humid conditions may give rise to ice on the sensor surface on cooling, causing irreversible damage. Maximum device heating/cooling . . . . 5 K/min

Whilst Marconi Applied Technologies has taken care to ensure the accuracy of the information contained herein it accepts no responsibility for the consequences of any use thereof and also reserves the right to change the specification of goods without notice. Marconi Applied Technologies accepts no liability beyond that set out in its standard conditions of sale in respect of infringement of third party patents arising from the use of tubes or other devices in accordance with information contained herein.

#2000 Marconi Applied Technologies

Printed in England

CCD55-30, page 11