BROADWAY,
IST-2001-32686 WP1-D13-Release II
version 1.0, date 02-02-05
Programme: IST
IST-2001-32686 BROADWAY
WP 1, D13 Release II – “Demonstration of key system elements”
Contractual Date of Delivery to the CEC:
M30
Actual Date of Delivery to the CEC:
M38
Work Package Leader:
Motorola S.A.
Participating partners:
TUD, Motorola S.A., Farran, IMST, Intracom, TNO, UoA
Security:
BROADWAY Public Information
Nature:
Report
Version:
1.0
Total number of pages:
61
Abstract:
The scope of the deliverable WP1-D13 “Demonstration of key system elements” is the presentation of the main innovative concepts and key elements of the IST-BROADWAY system from both, a theoretical study and practical hardware implementation point of view. Contrarily to the working-package based deliverables, this document groups the main research axes together in one framework: analogue front-end (RF front-end) and antennas aspects and innovations, physical layer (PHY) base-band system proposals and medium access control mechanisms including network architecture study results. Since the hardware implementation results was only available during the final phase of the IST-BROADWAY project, the WP1-D13 deliverable is edited twice: Release I (previous version) focuses on the theoretical study results, while Release II (this document) additionally summarises the results of the hardware implementation efforts.
Keyword list: BROADWAY, BRAN HIPERLAN/2, Physical Layer, Medium-Access-Control Layer
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version 1.0, date 02-02-05
Programme: IST
Contents Revision History................................................................................................................................................ 3 1. Scope ............................................................................................................................................................. 4 2. Definitions and Abbreviations....................................................................................................................... 5 3. BROADWAY Overview .................................................................................................................................. 5 4. Network Architecture .................................................................................................................................... 6 4.1 System Overview..................................................................................................................................... 6 4.2 BROADWAY Network Architecture (BWNA) Snapshot ......................................................................... 6 4.2.1. Functions of the AP and the MT’s ................................................................................................................... 7
4.3 HiperLAN/2 Enhanced Layered Architecture ......................................................................................... 7 4.3.1. Protocol Stack Architecture and Information Flow ......................................................................................... 8 4.3.2. Access Point..................................................................................................................................................... 8
4.3.2.1. BWDLC.................................................................................................................................... 8 4.3.2.2. BWSSCS .................................................................................................................................. 8 4.3.2.3. NCE .......................................................................................................................................... 9 4.3.3. Mobile Terminal .............................................................................................................................................. 9
4.3.3.1. BWDLC.................................................................................................................................... 9 4.3.3.2. BWSSCS .................................................................................................................................. 9 4.3.3.3. NCE ........................................................................................................................................ 10 4.4 BWSSCS Algorithms ............................................................................................................................ 10 4.4.1. Neighbourhood Discovery (ND).................................................................................................................... 10 4.4.2. Neighborhood Discovery Initiator (NDI)....................................................................................................... 10 4.4.3. BROADWAY Routing (BWR)......................................................................................................................... 11
4.5 Performance Issues ................................................................................................................................ 12 5. Enhanced Base-band Algorithms and Structure .......................................................................................... 14 5.1 Transmitter Physical Layer (Baseband) ................................................................................................ 14 5.1.1. HS Modulation Technique (OFDM) .............................................................................................................. 14 5.1.2. HS Guard Extension by Pseudo Random Postfix .......................................................................................... 14 5.1.3. HS Training Symbol Insertion ....................................................................................................................... 16
5.2 BER Simulation Results ........................................................................................................................ 17 5.2.1. Simulation Constraints and Channel Models ................................................................................................. 17 5.2.2. Selected BER Results..................................................................................................................................... 18
5.3 Synchronisation Enhancement .............................................................................................................. 20 5.3.1. Preamble Based Time Synchronisation.......................................................................................................... 20 5.3.2. Frequency Synchronisation............................................................................................................................ 23
5.3.2.1. General Issues......................................................................................................................... 23 5.3.2.2. Frequency Offset Estimation based on Phase Differences in Time Domain.......................... 23 5.3.2.3. Estimation of Large Frequency Offsets.................................................................................. 24 5.3.3. Phase Noise Issues ......................................................................................................................................... 27
5.4 Channel Estimation and Tracking ......................................................................................................... 28 5.4.1. Pilot Tone Pattern Proposals for the HSE Modes .......................................................................................... 28 5.4.2. Performance Analysis in a DOPPLER Environment ........................................................................................ 29
5.5 BROADWAY HIPERSPOT demonstrator .............................................................................................. 30 5.5.1. Demonstrator.................................................................................................................................................. 31 5.5.2. Behaviour of the RX design with a standard CP-OFDM demodulator.......................................................... 31
5.5.2.1. Transmitter outputs................................................................................................................. 32 5.5.2.2. Equalisation results................................................................................................................. 33 5.5.3. Behaviour of the RX design with a novel PRP-OFDM demodulator ............................................................ 34
5.5.3.1. PRP-OFDM based transmitter outputs ................................................................................... 34 5.5.3.2. Equalisation of PRP-OFDM output blocks ............................................................................ 35 5.6 EVALUATION OF THE BROADWAY HIPERSPOT demonstrator implementation based on a DigitalLoop-Back configuration............................................................................................................................. 36 5.6.1. Simulation and synthesis of the Tx ................................................................................................................ 36 5.6.2. Treatment of the analog IF signal .................................................................................................................. 38 5.6.3. Simulation and synthesis of the Rx................................................................................................................ 39 5.6.4. Measurement Results ..................................................................................................................................... 45 5.6.5. Conclusion ..................................................................................................................................................... 47
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5.7 EVALUATION OF THE BROADWAY HIPERSPOT demonstrator in combination with 5GHz/60GHz RF Front-Ends ................................................................................................................................................... 48 5.8 Conclusion............................................................................................................................................. 49 6. 60 GHz RF Front-end and Antennas ........................................................................................................... 50 6.1 RF Concept overview ............................................................................................................................ 50 6.2 MMIC development .............................................................................................................................. 50 6.3 Summary of the front-end test results.................................................................................................... 52 6.3.1. Test result for 60 GHz down-converter.......................................................................................................... 52 6.3.2. Test result for the 60 GHz up-converter......................................................................................................... 52
6.4 Design of the integrated BROADWAY system front-end ....................................................................... 53 6.5 Antenna array design at 60 GHz & Measurements ............................................................................... 54 7. Conclusions ................................................................................................................................................. 58 8. References ................................................................................................................................................... 59
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version 1.0, date 02-02-05
Programme: IST
Revision History The following table contains brief comments on the latest modifications of this document. Date
Revision
Description
05/08/2004
1.0
Initial version of Release I
02/02/2005
1.0
Initial version of Release II
3
Contributors Jens Schönthier (TUD), Markus Mück (CRM), Konstantinos Ntagkounakis (INTRACOM), Emil Entchev (FARRAN) Jens Schönthier (TUD), Markus Mück (CRM), Konstantinos Ntagkounakis (INTRACOM), Emil Entchev (FARRAN)
BROADWAY, IST-2001-32686
WP1-D13-Release II
version 1.0, date 02-02-05
Programme: IST
1. Scope The Scope of the deliverable WP1-D13 “Demonstration of key system elements” is the presentation of the main innovative concepts and key elements of the IST-BROADWAY system from both, a theoretical study and practical hardware implementation point of view. Contrarily to the working-package based deliverables, this document groups the main research axes together in one framework: analogue front-end (RF front-end) and antennas aspects and innovations, physical layer (PHY) base-band system proposals and medium access control mechanisms including network architecture study results. Since the hardware implementation results was only available during the final phase of the IST-BROADWAY project, the WP1-D13 deliverable is edited twice: Release I (previous version) focuses on the theoretical study results, while Release II (this document) additionally summarises the results of the hardware implementation efforts. The document is organised as follows: Chapter 3 gives a short overview about the BROADWAY project and system as a whole. Chapter 4 details on network-specific results of BROADWAY which were achieved by WP2. Base-band specific study and simulation results gained by WP3 are given in chapter 5, the focus is on enhanced algorithms and demonstrator issues. Chapter 6 presents study and measurement results of WP4 concerning front-ends end antennas for 60 GHz. Finally chapter 8 gives all references used throughout this document.
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version 1.0, date 02-02-05
Programme: IST
2. Definitions and Abbreviations 16-QAM 64-QAM ADC AP AWGN BER BPSK BRAN BWCL BWDLC BWNA BWR BWSSCS CC CDF CH CIR CL CP CPCS CPE CPNR CS DAC DC DLC ESSCS ETSI FEC FFT FN FPGA HEMPT HIPERLAN HL/2 HS HS/C HS/E i.i.d. I/Q ICI ID IF IFFT ISI
LAN LNA LO LOS MAC MFL MH MMIC MMSE MSE MT NCE ND NDI NDP NF NLOS OFDM OLA P1dB PA PAPR PCB PDP PHY PLDRO PRP QAM QMMIC QoS QPSK RF RF RN RX SFN SNR SSCS TX UP WLAN WP WPAN ZF ZP
16ary QAM 64ary QAM Analogue-to-Digital Converter Access Point Additive White Gaussian Noise Bit Error Rate Binary PSK Broadband Radio Access Networks BROADWAY CL BROADWAY DLC BROADWAY Network Architecture BROADWAY Routing BROADWAY SSCS Convolutional Code cumulative distribution function Cluster Head Channel Impulse Response Convergence Layer Control Plane / Cyclic Prefix Common Part CS Common Phase Error Carrier to Phase Noise Ratio Convergence Sublayer Digital-to-Analogue Converter Direct Current Data Link Control Ethernet SSCS European Technology Standardis. Institute Forward Error Correction Fast FOURIER Transformation Forwarder Node Field Programmable Gate Array High Electron Mobility Pseudomorphic Transistor High Performance Radio LAN BRAN HIPERLAN/2 HIPERSPOT HS Compatible (mode) HS Enhanced (mode) independent and identically distributed In-phase/Quadrature-phase Inter-Carrier Interference Identifying Number Intermediate Frequency Inverse Fast FOURIER Transformation Inter-Symbol Interference
5
Local Area Network Low Noise Amplifier Local Oscillator Line of Sight Medium Access Control Monitor Flows Message Handler Monolithic Microwave Integrated Circuit Minimum MSE Mean Square Error Mobile Terminal Node Communication Entity Neighbourhood Discovery ND Initiator ND Processing Noise Figure None Line of Sight Orthogonal Frequency Division Multiplex Overlap-Add 1-dB compression point Power Amplifier Peak-to-Average-Power Ratio Printed Circuit Board Power Delay Profile Physical Layer Phase Locked Dielectric Resonator Oscillator Pseudo Random Postfix Quadrature Amplitude Modulation Quantum MMIC Quality of Service Quaternary PSK Radio Frequency Radio Frequency Resource Needs Receiver Single Frequency Network Signal-to-Noise Ratio Service Specific Convergence Sublayer Transmitter User Plane Wireless LAN Working Package (within BROADWAY) Wireless Personal Area Network Zero Forcing Zero-Padded
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Programme: IST
3. BROADWAY Overview The objective of BROADWAY is to define, develop and demonstrate key components of a hybrid dual frequency system based on HIPERLAN/2 OFDM high spectrum efficiently technology at 5 GHz and an innovative fully ad-hoc extension at 60 GHz named HIPERSPOT equipped with a novel more robust modified multi-carrier transmission scheme. The main target is to offload the 5 GHz radio band in dense deployment areas, to exactly focus radio beams and to allow unlicensed and self-organising autonomous operation. Seamless switching between 5 GHz and 60 GHz is supported. BROADWAY tasks are split into 6 work-packages: The management of the project and all coordination activities are addressed in WP0 while WP5 is responsible for industrial dissemination in standardisation bodies and international conferences. A new hybrid OFDM based radio architecture integrating 5 GHz HIPERLAN/2 (HL2) technology and a new 60 GHz HIPERSPOT extension bridging centralised WLAN with fully ad-hoc networks is defined in WP1 dealing with application scenarios and system specification. WP2 focuses on BROADWAY link layer, convergence layer architecture and implementation. Performance evaluation of ad-hoc, multihop algorithms enabling QoS in WLAN and WPAN is performed and enhancements of HL/2 DLC and convergence layer suited for operation in both 5 GHz and 60 GHz bands granting seamless switching between HL/2 and HIPERSPOT for spectrum offloading as well as transparent fallback strategies to 5 GHz when the 60 GHz link is broken (inter/intra-system hand-over) are proposed. Moreover, validation of the DLC and CS layer architectures is demonstrated. In the advanced baseband algorithm extension WP3, the two HIPERSPOT 60 GHz transmission modes parameters are specified preferably allowing backward compatibility with 5 GHz OFDM technology. New guard time contents for OFDM are proposed as a novel multi-carrier modulation scheme for 60 GHz granting better multipath resistance and robust channel estimation/tracking. Enhanced equalisation schemes and adaptation of usual synchronisation algorithms are derived. Moreover building blocks of HL/2 are adapted to cope with 60 GHz requirements. Implementation of the resulting system and experimental validation is conducted. WP4 provides a low cost integrated RF front-end architecture with dual 5/60 GHz frequency operation. For its high integration capabilities, the front-end is modelled/fabricated using QMMIC multi-functional blocks, which are based on the combination of conventional MMIC using hybrid HEMPT (High Electron Mobility Pseudomorphic Transistor) technology and Resonant Tunnelling Diodes. New key planar 60 GHz antenna design and prototyping is performed. The scalability and implementation issues for micro/macro diversity in the 60 GHz range are investigated. The HIPERSPOT part of BROADWAY will consist of two subsystems at 60 GHz: • HIPERSPOT/C (HS/C): A HL/2 compatible mode at 60 GHz, which shall offer mainly the same transmission capabilities as HL/2, but at 60 GHz. It is intended to keep the HL/2 compatible mode at 60 GHz as close to the HL/2 PHY layer specification as possible, but some changes might be required in order to make low-cost devices possible. • HIPERSPOT/E (HS/E): This is a new innovative extension of the HL/2 at 60 GHz in order to cope with special environments and offering significantly higher data rates by exploiting the higher bandwidths available at 60 GHz. HS/E Extension The global structure is illustrated by Figure 3.1. BROADWAY defines two different but compatible classes of mobile terminals: Bandwidth: 20 MHz HS/C • Class A: Will be derived from limited extensions HL/2 @ 60GHz Data Rate: 6 - 54 MBits/s of the HL/2 hardware transposed in the 60 GHz space. Those devices will support HL/2 and HS/C. (Add-on to HS/C) • Class B: Standing for high-end devices this class will support HL/2, HS/C, and HS/E. Bandwidth: 20 - 240 MHz ⇒ Class A = HL/2 + HS/C Data Rate: 6.67 - 720 MBits/s ⇒ Class B = HL/2 + HS/C + HS/E Thus, a working HL/2 link will always be required Figure 3.1: HIPERSPOT subsystems. for a HIPERSPOT link at 60 GHz to be established. Key parts of the BROADWAY concept will be demonstrated on a specific platform containing a fast embedded processor and a large FPGA handling the PHY proposed functions together with a dual 5/60 GHz QMMIC front-end. MAC/DLC protocols will be implemented in a software-based demonstrator. 5
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Programme: IST
4. Network Architecture 4.1 System Overview In this section we present the network architecture as it is considered in BROADWAY (to be referred to as BWNA), [14]. BWNA consists of two separate network architectures that operate concurrently. The basic network architecture is a HiperLAN/2 system that operates as a WLAN system in the 5 GHz band. Under the BROADWAY system, the HiperLAN/2 AP and MT devices are enhanced to be able to operate in a second band at 60 GHz also. Given the nature of the signal propagation at the 60 GHz band, short-range highcapacity communication between a pair of terminals may be possible. In this sense, if the 5 GHz HiperLAN/2 system is congested in terms of traffic, the 60 GHz communication, if feasible, may be used to serve traffic needs and increase the overall capacity. The devices that operate at the 60 GHz band form a separate ad-hoc network, which can be seen as the extended network architecture of BWNA. The ad-hoc network operates in a centralised manner, similar to HiperLAN/2, in the sense that the MTs that are able to communicate with each other at 60 GHz form a cluster and one of them plays a coordinative role similar to that of the AP. A brief description of the BWNA architecture as well as all the necessary enhancements in the HiperLAN/2 protocol stack are presented in the following paragraphs.
4.2 BROADWAY Network Architecture (BWNA) Snapshot In HiperLAN/2 the range of AP (i.e. HiperLAN/2 cell) is about 50 meters but for the 60 GHz mode of operation the range is around 10 meters. Consequently, in order to take advantage of the higher bit-rate links at 60 GHz, an extended ad-hoc network architecture is defined. This network architecture is necessary to resemble the 5 GHz mode of operation in miniature (small number of present nodes). Therefore, we introduce the notions of a cluster of nodes, the cluster head (CH) of a cluster of nodes and the forwarder node (FN). Figure 4.1 depicts a BWNA snapshot where, the HiperLAN/2 cell is denoted by the dashed line, while the 60 GHz clusters are denoted by the full line. A cluster of nodes is a set of MTs AP (and/or the AP) that operate at the same 60 GHz frequency channel for a specific time period. Each cluster is characterised by the specific 60 GHz frequency channel, the set of MTs that belong to the particular cluster, the cluster lifetime in terms of HiperLAN/2 frames and the cluster head responsible for the particular cluster. A cluster head (CH) is one of the participant MTs that plays a role Access Point 5 GHz Range AP similar to that of the AP, that is it is Cluster Head 60 GHz Range responsible to construct the 60 GHz CH frame for the corresponding 60 GHz Forwarding Node 5 GHz Data Flow FN channel of the cluster. Mobile Terminal 60 GHz Data Flow During the ad-hoc network operation at 60 GHz, adjacent clusters operate at Figure 4.1: BWNA Snapshot. different channels at 60 GHz. To allow communication between adjacent clusters, MTs that belong to both clusters are instructed to listen to both 60 GHz channels periodically (i.e. participate in both clusters) and play the role of a bridge in exchanging data. These MTs are called Forwarder Nodes (FN). It should be mentioned that in order to identify and activate the 60 GHz ad-hoc network, the core HiperLAN/2 system is enhanced by a Neighbourhood Discovery (ND) algorithm, a process used to identify the 60 GHz connectivity and a Clustering algorithm that creates and activates the clusters based on connectivity and traffic needs. These algorithms are described in detail in the following paragraphs. CH
CH
CH
FN
CH
CH
CH
FN
6
CH
FN
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Programme: IST
4.2.1. Functions of the AP and the MT’s The AP has the following roles in the BROADWAY system: • Standard AP role: The AP plays the role of an AP at 5 GHz, as it is described in the HiperLAN/2 standard. In addition, the AP is responsible to: (a) initiate a ND phase at 60 GHz and participate to the particular phase; (b) collect all 60 GHz connectivity information regarding the ND phase; (c) consult the resource requests from all MTs; (d) decide on the clusters, cluster heads and FNs and lifetime of each cluster; (e) inform all MTs with the corresponding cluster information. • AP as a Cluster head: The AP is responsible for its 60 GHz neighbourhood and the data exchange between MTs located in the corresponded cluster. Note that AP has two RF modules and can operate at both 5 and 60 GHz concurrently. The MT can operate only at one frequency band at a time and accordingly plays four different roles: • Participates at the 5 GHz. • Participates at a 60 GHz cluster. • Participates at a 60 GHz cluster as a CH. • Participates at a 60 GHz cluster as an FN.
4.3 HiperLAN/2 Enhanced Layered Architecture The aforementioned BWNA requires certain modifications of the standard HiperLAN/2 protocol stack that are briefly shown. The enhanced protocol stack, as proposed in BROADWAY is shown in Figure 4.2. The terms BWSSCS and BWDLC are used to give emphasis to the fact that this specific sublayer and DLC correspond to the particular enhancements required by the project. BWCL denotes the corresponding CL. BWSSCS contains all necessary functionality to adapt HiperLAN/2 specific packets to Ethernet packets and the underlying dual mode ad-hoc environment. Data are travelling through BWSSCS, CPCS, BWDLC, PHY Data Flow and vice versa. This is called User Plane (UP). Control NCE ETH information is exchanged through the Control Plane (CP). The Ctrl NCE (Node Communication Entity) exchanges control BWSSCS BWCL information with BWSSCS and its role is primarily to help with Ctrl CPCS the exchange of messages directly between the AP and the MTs. BWSSCS contains all functionality as it is described in BWDLC the ETSI document regarding the Ethernet SSCS, [4], (to be referred to as the ESSCS). The enhancements required by PHY BROADWAY involve the realisation of (a) a communication for CP UP the exchange of control messages between the CP of BWSSCS and the CP of BWDLC (Ctrl) as well as between NCE and Figure 4.2: Representation of the enhanced BWSSCS and (b) a peer-to-peer (prtpr) communication HIPERLAN/2 protocol stack under BROADWAY. between the NCE of any two nodes through the 5 GHz HiperLAN/2 operation. Figure 4.3 depicts the prtpr communication, which is dedicated for the message exchange between the NCE of a node and the NCE of another node. The messages exchanged through the NCE are created or processed in BWSSCS. NCE is responsible to realise this communication but BWSSCS is interesting for the information carried by these messages. Consequently, it is equivalent to say that the CP of BWSSCS communicates through the prtpr communication with the CP of the BWSSCS of another node. AP
MT NCE
Ethernet
prtpr
BWSSCS
Ctrl
Ctrl
CPCS
BWDLC
Control Plane
NCE
BWSSCS
CPCS
PHY
Ethernet
BWDLC
Data Flow
User Plane
PHY User Plane
Control Plane
Figure 4.3: Peer-to-Peer (prtpr) communication between two nodes in BROADWAY.
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Programme: IST
4.3.1. Protocol Stack Architecture and Information Flow The enhanced protocol stack presented previously contains certain modules that implement the functionality required for the support of BWNA. Information is exchanged between modules represented either by tables or by messages. Here, those modules and the information flow among them will be presented for BWSSCS and BWDLC for both cases (AP and MT).
4.3.2. Access Point Figure 4.4 depicts the new modules of the AP, the information maintained and the information flow among modules. The modules are represented as ellipses and the tables where information is stored as rectangles. Thin arrows resemble sharing of information while thick arrows represent information that will be transmitted through the UP (either using the prtpr communication in the case of BWSSCS or special channel inside the frame in the case of BWDLC). Access Point NCE
Cluster Specific Information
prtpr messages
MH
Ethernet
CH_R_table CH_C_table
BWSSCS NDI
MAC_ID_table
FN_table
Next ND Phase
BWR
C_table MTi_table
BWRR_table
ND_table
MFL
NDP
RN FL_table
BWDLC AP_table
ND
ND
messages
Control Plane
User Plane
Figure 4.4: Architecture and information flow for the AP.
4.3.2.1. BWDLC BWDLC contains the following modules as it is depicted in Figure 4.4. The corresponding information is also described. • Neighbourhood Discovery (ND): This module is responsible to identify the MTs that are reachable by the AP at 60 GHz. A ND phase is initiated by a specific message from BWSSCS (called Next ND Phase in Figure 4.4). For the purpose of neighbourhood discovery, messages at 60 GHz called ND messages (Figure 4.4) are exchanged. The output of the ND module (called AP_table) contains the neighbourhood of the AP at 60 GHz and is forwarded to BWSSCS.
4.3.2.2. BWSSCS • Monitor Flows (MFL): This module is responsible to monitor the amount of data to be transmitted for a specific pair source-destination for a comparably large time period (large number of frames). This information (called FL_table) will be accessed to identify the resource needs of each pair of MTs in the network. • Resource Needs (RN): This module is responsible to estimate the needs for resources for a certain pair of MTs (source-destination). It uses, as input the FL_table and identifies the corresponding needed resources for a pair of MTs (BWRR_table). • Neighbourhood Discovery Processing (NDP): This module is responsible to create the table that contains the neighbourhood information at 60 GHz for the network (called ND_table). The input received is its own neighbourhood information (AP_table from BWDLC) and the neighbourhood information from all MTs (called MTi_table for each MT i present in the network). 8
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• Neighbourhood Discovery Initiator (NDI): This module is responsible to decide on the actual frame that the next ND phase will take place (Next ND Phase). The next ND phase is possible to take place after a fixed number of frames or by estimations based on the changes of the neighbourhood information at 60 GHz (ND_table). • BROADWAY Routing (BWR): This module is responsible to decide on the set of clusters (called C_table) and FNs (FN_table) extracting the routing information based on the output of the last ND phase (ND_table) and the requested resources from the MTs (BWRR_table). Information from NDI (Next ND Phase) is also required to decide on the lifetime of each cluster.
4.3.2.3. NCE Message Handler (MH): This module is responsible to create all messages that will be sent through the prtpr communication. It uses information that maps the Ethernet addresses to MAC IDs (MAC_ID_table) as well as the output of BWR (R_table, C_table and FN_table). The MH informs all MTs about cluster information and creates the corresponding tables for the operation of the AP as a CH whenever is needed. This information corresponds to the set of the MTs that are present in the cluster at 60 GHz (CH_C_table), the routing information useful especial for intra-cluster communication (CH_R_table). Information regarding the cluster lifetime, the specific frequency channel etc. is also maintained (called Cluster Specific Information in Figure 4.4). Another responsibility of the MH module at the AP is to receive messages from the prtpr communication that include the neighbourhood table for every MT (MTi_table) as well as the needs for resources from each MT (FLi_table).
4.3.3. Mobile Terminal Figure 4.5 depicts the new modules of the MT, the information maintained and the information flows among modules. Mobile Terminal NCE
Cluster Specific Information
prtpr messages
MH
Ethernet
CH_R_table CH_C_table
BWSSCS Next ND Phase
BWDLC MTi_table
ND
ND
messages
Control Plane
User Plane
Figure 4.5: Architecture and information flow for the MT.
4.3.3.1. BWDLC BWDLC contains the following modules as it is depicted in Figure 4.5. The corresponding information is also described. • Neighbourhood Discovery (ND): This module is responsible to identify the MTs that are reachable by the particular MT at 60 GHz. A ND phase is initiated by a specific message from BWSSCS (called Next ND Phase in Figure 4.5). For the purpose of neighbourhood discovery, messages (called ND messages in Figure 4.5) at 60 GHz are exchanged and the UP (frame format) supports this message exchange, as it will be shown in a following section. The output of the ND module for the particular MT (called MTi_table) contains the neighbourhood of this MT at 60 GHz and is forwarded to BWSSCS.
4.3.3.2. BWSSCS The SSCS at the MT had limited functionality, as it would have expected given that the AP has the majority of the responsibilities.
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4.3.3.3. NCE Message Handler (MH): This module is responsible to receive messages from the prtpr communication information regarding cluster information. The MH creates the corresponding tables for the operation of this MT as a CH (whenever is needed). This information corresponds to the set of the MTs that are present in the cluster at 60 GHz (CH_C_table), the routing information useful especial for intra-cluster communication (CH_R_table). Information for the case the MT plays the role of a MT at 60 GHz or the role of a FN (cluster lifetime, the specific frequency channel, corresponding CH or CHs etc.) is also maintained (called Cluster Specific Information in Figure 4.5). The MH module is also responsible to create all messages that will be sent through the prtpr communication. It is evident that this information corresponds to messages regarding the neighbourhood of the particular MT.
4.4 BWSSCS Algorithms The core of the BROADWAY operation is based on the Neighbourhood Discovery (ND), Neighbourhood Discovery Initiator (NDI) and the BROADWAY Routing (BWR) algorithms. These algorithms are of special interest since their behaviour greatly affects the BROADWAY performance. For example, the ND should provide an accurate view of the ad-hoc network topology at 60 GHz and it should not last too many frames in order not to waste network resources. Frequent initiation of ND phases, if the mobility is low, may lead to wasted network resources at 5 GHz while may also interrupt a successful off-loading process at 60 GHz. In case of high MT mobility and rare initiation of ND, then the BWSSCS may not have an accurate 60 GHz adhoc network topology. It is NDI’s responsibility to balance the ND initiation according to mobility. Finally, BWR has to efficiently create the clusters, distribute the CHs and the FNs roles, and decide on cluster lifetime. This should be done in a way to achieve offloading at 60 GHz without affecting the normal HiperLAN/2 operation.
4.4.1. Neighbourhood Discovery (ND) The ND process provides information about the ad-hoc topology to the AP by discovering the directly reachable neighbours (i.e. one-hop away) of all MTs inside the cell and measuring the quality of the corresponding links. Every MT and the AP participate in a ND phase by exchanging hello messages and maintain neighbourhood information in the form of a list containing the neighbours and the status of the corresponding links. This information is sent to the AP, which is responsible for the path selection. The AP decides a ND phase should be performed. It may be done periodically or be event-driven based on several criteria such as: the available bandwidth at the centralised frequency, the density of users inside the cell, the number of new users in the system, the detected link breakages at the ad-hoc frequency and the elapsed time since the last ND phase. The AP sends a broadcast message to inform all MTs inside its HiperLAN/2 coverage area, indicating the frequency channel that is used for the ND phase, the time instant at which this procedure is initiated and potentially the transmission schedule of the hello messages. The MTs and the AP exchange hello messages based on their MAC IDs, in order to determine their one-hop away neighbours and construct their link state tables. After receiving its neighbours’ hello messages, each MT can determine the state of each one-hop away link by estimating the signal-to-noise ratio provided by the physical layer. Depending on the estimated link state, different transmission rates (and communication levels) may be achieved. At the end, the MTs forward the collected information (MTi_table) to the AP.
4.4.2. Neighborhood Discovery Initiator (NDI) For the NDI operation it is assumed that the decision regarding when the next ND phase should occur is taken immediately after the end of the current ND phase. The connectivity information from the current ND is process and the “Next ND Phase” message is sent immediately after. Suppose that a ND phase has just been completed and f old is the number of frames since the previous ND phase. The objective is to identify the number of frames f new after which a new ND phase should take place. Let the ND_table, which was calculated during the last ND phase, be denoted by NDnew , whereas the ND_table, which was calculated during the previous ND phase, be denoted as NDold . Let ∆ { X } be that matrix operation that derives the number of non-zero elements of table X , [13]. It is clear that f new is influenced by f old and ∆ { NDnew − NDold } . If ∆ { NDnew − NDold } is rather small (below a certain threshold threshold A ) then the number of frames until the new ND phase may be increased. If ∆ { NDnew − NDold } is rather high (above a certain threshold threshold A ≥ threshold B ) then the number of 10
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frames until the new ND phase may be reduced. For those values of ∆ { NDnew − NDold } that are between the two thresholds the number of frames until the next ND phase may remain the same.
f new
⎧ f old + drift if ⎪ = ⎨ f old if ⎪ f − drift if ⎩ old
∆ { NDnew − NDold } ≤ threshold A threshold A < ∆ { NDnew − NDold } ≤ threshold B ∆ { NDnew − NDold } > threshold B
Figure 4.6: The NDI Algorithm.
The algorithm presented in Figure 4.6 describes the basic structure of the NDI algorithm. Parameter drift is a positive natural number. It is clear that a large number of changes in the topology requires frequent ND phases whereas few changes require less frequent executions of ND. It is obvious that for appropriate values of the thresholds and the parameter drift , this algorithm is able to avoid hazardous situations (i.e. frequent ND phases when mobility is small or rare ND phases when mobility is high).
4.4.3. BROADWAY Routing (BWR) The BWR algorithm [13] is responsible to identify the traffic needs, assert link availability and create routes for the reliable exchange of traffic through the 60 GHz channels. The BWR is considered as the heart of BROADWAY system and it is critical for the overall system performance improvement. Successful offloading can significantly increase the total capacity of the system; however, there is always a corresponding cost concerning the switching of several MTs to the 60 GHz band to create a cluster. During the cluster lifetime, the switched MTs may lack access to several MTs (i.e. those still operating at 5 GHz and those in isolated clusters) or the core network, which may result in receiving/transmitting delayed data and have a major impact on certain delay-sensitive applications. Another factor that affects the performance of BWR is the confidence in the operation of the 60 GHz links given their high dependency on MT mobility. If a broken link situation occurs in the path from the source to the destination (i.e. during cluster operation) the off-loading operation is cancelled and data remain in the source or the CH in order to be forwarded later through HiperLAN/2 standard operation; delay is again introduced. It is reasonable to assume that the ND algorithm provides accurate information for the ad-hoc network topology when it is completed. However, as time passes, the probability that the topology has changed due to mobility increases. To minimise the probability of a BWR decision failure due to mobility, the BWR is executed immediately after a ND phase. START The basic steps of the BWR operation are presented in the flow chart seen in Figure 4.7. When initiated, the BWR accesses the Select a pair of MTs with heavy traffic exchange. FL_table to identify a pair of MTs that exchange a significant amount of data worthy NO x-hop link to be served through a 60 GHz link in order to neighbors at 60Ghz ? off-load the 5 GHz mode of operation. BWR x < threshold NO starts the first loop by identifying and YES processing the pair with the highest traffic demands as it appears in the FL_table, Do the source, continues with the next pair and stops when all destination, or Do the MTs satisfy YES intermediate-hops have the requirements to source-destination combinations are processed. traffic obligations to participate in the other MTs ? cluster ? The next step is to access the ND_table to NO identify if there is a path between the source and the destination in the 60 GHz network YES • Distribute CH, FN Roles and topology. As the number of hops increases, the notify the Participating MTs path becomes more vulnerable to mobility • Update AP’s Routing Tables (notify for the absence of the MTs) changes and this is the reason why the BWR only considers paths up to a certain number of NO hops. If no route can be found, the BWR End of pairs proceeds to the next pair. YES In case a path is available, the BWR is trying to STOP identify whether there exist any other traffic flows between both the source and the Figure 4.7: The BWR Algorithm. destination MTs and other MTs operating at 11
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the 5 GHz mode. If any of them has traffic flows to other MTs, then these flows should be interrupted when they switch to a 60 GHz channel. In this case, the BWR asserts the possibility that those MTs can be incorporated in the 60 GHz cluster as well (in a similar BWR process). If this is not possible, the BWR resumes and proceeds to another candidate pair. If there are no traffic flows to other MTs, the BWR creates the clusters and distributes the CH, FN and CN roles to the participant MTs. Each cluster’s lifetime is selected, in this case, to be long. However, it should always be smaller than the interval until the next ND process ( f new ). When the cluster is created, the participant MTs are notified and provided all relevant information through prtpr messages, while the AP notifies its MAC functions not to allocate resources at 5 GHz for the participant MTs during the cluster’s lifetime. For the case of the AP’s 60 GHz cluster, the AP updates its routing information. If there are data flows with small traffic requirements to other MTs, another strategy is to create a cluster with very short lifetime that will be periodically activated until the next ND phase. In this manner, offloading may occur in data sessions, while traffic flows to HiperLAN/2 associated MTs can be preserved. According to the BWR operation described above, two are the key parameters that affect the BROADWAY performance. The first is mobility, which may result in broken link situations during the 60 GHz mode of operation. One way to reduce the significance of mobility is to select shorter cluster lifetimes; however, in this case the off-loading gains will be exploited for a shorter time. A more complex approach is to monitor the topology changes, through the ND phase, and use this information to optimise the BWR decision process. When mobility is high, the BWR can be applied with more strict criteria. Such a criterion would be to restrict the length of the 60 GHz paths to single-hop paths only. The second parameter corresponds to the traffic conditions. If the nature of the data traffic is highly bursty, then the BWR may decide on cluster creation based on high traffic demands and during the cluster operation the traffic demands may become smaller (for example an application that stops running). In this case, the traffic burstyness (if known) can be used as a criterion to select a shorter cluster lifetime. Another important issue arises when the data flow from a particular MT changes destinations frequently. If this is the case, a cluster may be erroneously created based on a particular data flow, which may not exist during the cluster operation. To deal with traffic issues, periodic cluster activations, as described above, are required to be adopted to the particular environment. Alternatively, the MTs that experience traffic burstyness or flow changes may be excluded from the BWR process if their behaviour is hazardous for the system performance.
4.5 Performance Issues The ND process constitutes the main control overhead for BROADWAY since it requires that the system remains inactive until it is completed and for this reason it should not be executed frequently. On the other hand, this process is mandatory to be executed as it provides useful information for the establishment of adhoc paths. The overhead induced by the messages required to establish the paths at 60 GHz is lower and has not been taken into account for our study, [14], [15]. A cell of 100 m × 100 m with 50 moving MTs has been simulated in ns-2, in order to calculate the overhead of the ND process. Simulations were run for 300sec. The results were averaged over 5 runs for each scenario. Estimations of the length of the required hello messages and link state tables were made. Two different communication levels ℓ were considered based on the distance between two MTs, one for 6m and another for 15m. Two MTs that are d meters apart can establish a level ℓ communication as long as 0.8ℓ ≤ d ≤ 1.2ℓ. A sequence of n MTs each of which is away from the preceding MT by some distance in (0.8ℓ, 1.2ℓ) is said to form a level ℓ path of length (n-1) hops. It has been shown that lower communication distances may provide under different modulation techniques higher data rates. For this reason, 15m-paths are referred to as lowrate paths, whereas 6m-paths correspond to higher rates. Mobility has been modelled using the random waypoint model. Each MT starts its journey from a random location and moves toward a random destination at a randomly chosen speed v (uniformly distributed between 0 and vmax (in m/sec), where vmax ∈ {1, 3, 5, 10, 15, 20}). Once the destination is reached, another random destination is targeted after a pause. In indoor applications, no high MT speeds (more than 3 m/sec) are expected. Nevertheless, in low-power transmissions the attenuation is higher and more vulnerable to indoor environments (where signals would have to penetrate obstacles to reach a destination). Thus, higher MT speeds have been used to illustrate the dynamic nature of short-range multi-hop network employed as well as dynamic environments induced by the propagation characteristics of 60 GHz. For the same reason, all results that are presented here correspond to a pause time of 0 sec.
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Number of hops
Number of hops
Figure 4.8 illustrates the mean path lifetime of the two Max Speed: 1m/sec communication levels (high-rate and low-rate) versus 4 the number of their hops for the case of maximum 3 speed of 1 m/sec and 20 m/sec. Although shorter 2 distances may allow for higher rates, the shorter-range paths are more vulnerable to link failures. In high 1 speeds (20m/sec), the mean path lifetime decreases by 0 10 20 30 40 50 a factor of 10, while it is observed that the highest Mean path lifetime (sec) percentage of decrease in the mean path lifetime occurs High-rate path Low-rate path between the first and the second hop of a path. Max Speed: 20m/sec In Figure 4.9 and Figure 4.10, the dependence of the overhead of the ND process from the number of hops 4 that constitute a path, the number of MTs inside the 3 cell, the different communication levels and mobility is 2 shown. The ND overhead is defined as the fraction of 1 time during which ND is performed (including the 0 1 2 3 4 5 required switching time to the frequency channel of Mean path lifetime (sec) ND). The number of MTs inside a cell affects the ND High-rate path Low-rate path overhead since it affects its duration. We assume that ND is periodically performed with such a period that Figure 4.8: Mean path lifetime versus the number of hops. more than 90 % of the calculated paths do not break between two consecutive NDs for the specific speed and communication level. More overhead is required to maintain 90 % of the paths in case of more hops (due to their shorter lifetime) or when the speed increases (due to the higher probability of a link failure). Although the lifetime of multi-hop paths is low, a large amount of information can be sent over them, since the 60 GHz frequency band can support very high bit rates. To establish these high transmission rate paths, BROADWAY needs to update the ND information. The periodicity of the ND process is adjusted (so is the induced overhead) according to the supported communication level (transmission rate) and mobility (dynamic nature of the 60 GHz environment). High-rate single-hop path
0,700% 0,600% 0,500% 0,400%
2,500% Overhead of ND
Overhead of ND
High-rate path, Max Speed: 1m/sec
0,300% 0,200% 0,100% 0,000% 25
50
75 100 125 150 Number of MTs in a cell 1-hop 2-hop 3-hop
175
1m/sec
2,000%
3m/sec
1,500%
5m/sec
1,000%
10m/sec 15m/sec
0,500%
20m/sec
0,000%
200
25
Overhead of ND
Overhead of ND
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100
125
150
175
200
Number of MTs in a cell 1-hop
2-hop
3-hop
100
125
150
175
200
Low-rate single-hop path
0,300% 0,250% 0,200% 0,150% 0,100% 0,050% 0,000% 50
75
Number of MTs in a cell
Low-rate path, Max Speed: 1m/sec
25
50
4-hop
0,800% 0,700% 0,600% 0,500% 0,400% 0,300% 0,200% 0,100% 0,000%
1m/sec 3m/sec 5m/sec 10m/sec 15m/sec 20m/sec 25
50
75
100
125
150
175
200
Number of MTs in a cell
4-hop
Figure 4.9: The overhead of ND versus the number of MTs inside a cell (for paths consisting of different number of hops).
Figure 4.10: The overhead of ND versus mobility (for paths consisting of different number of hops).
In hotspots, where traffic needs are high and the number of users is increased, is always the need for extra capacity. It is shown that even in the worst case the ND overhead to support short-range paths that provide high bit-rates does not exceed 7 %. Consequently, the BWR algorithm decides between the offloading capability of shorter-range, multi-hop paths and the increased induced ND overhead based on the traffic needs. 13
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5. Enhanced Base-band Algorithms and Structure 5.1 Transmitter Physical Layer (Baseband) 5.1.1. HS Modulation Technique (OFDM) For HS/C the OFDM parameters (see Table 5.1) are chosen according to section 5.6 in [7]. The OFDM parameters of non-stacked OFDM HS/E (HS/ExN, see Table 5.1) are based on HS/C but are extended to higher bandwidths and, thus, higher numbers of sub-carriers. Sub-carrier distance and OFDM-symbol length are left as they are for HS/C, the guard-interval length is fixed at 400 ns. Table 5.1: OFDM parameters for HS/C and non-stacked HS/E. Parameter Mode Sampling rate fs=1/T (resp. bandwidth) Sampling period OFDM type Duration of CP or PRP Symbol interval (minimum) FFT size Number of sub-carriers Number of data sub-carriers Number of pilot sub-carriers Total number of used sub-carriers ratio data/total carriers Sub-carrier spacing
HS/C 20 MHz 50 ns CP* 0.8 µs (opt. 0.4 µs) 4.0 µs (opt. 3.6 µs) 64 64 48 4 52
HS/E1
Value HS/E2N HS/E3N 40 MHz 80 MHz 25 ns 12.5 ns PRP** 0.4 µs 3.6 µs 128 256 128 256 96 192 8 16 104 208 0.75 312.5 kHz
HS/E4N 240 MHz 4.167 ns
768 768 576 48 624
5.1.2. HS Guard Extension by Pseudo Random Postfix Many of the known systems are unable to decode all carriers of OFDM symbols in the presence of channel nulls. Ideally, a novel OFDM modulation system would keep all the advantages of classical OFDM and additionally allow very simple and completely blind channel estimation at the receiver. No additional redundancy would be added to the system and therefore no bandwidth would be lost. Such a system would be advantageous in low-mobility scenarios and would make OFDM systems applicable to high-mobility scenarios as well. The idea behind Pseudo Random Postfix OFDM is to replace the cyclic prefix of standard OFDM by a deterministic, eventually scalar weighted (→ pseudo random i.i.d.) constant postfix that is a-priori known to both, the transmitter and the receiver. So, the resulting frame is composed as indicated by Figure 5.1. The resulting OFDM modulator is presented by Figure 5.2. α k −1 ⋅ Postfix
OFDM symbol # k
α k ⋅ Postfix
OFDM symbol # k + 1 α k +1 ⋅ Postfix OFDM symbol # k + 2
Figure 5.1: A typical frame based upon Pseudo-Random-Postfix OFDM.
HL/2 [7] imposes the introduction of a cyclic prefix after the IFFT block leading to a standard CP-OFDM modulation. This method will also be used for HS/C. In the case of HS/E, instead of the cyclic prefix, a constant postfix pseudo-randomly weighted by a scalar factor αk is inserted leading to the new PseudoRandom-Postfix OFDM (PRP-OFDM) modulation. The latter approach enables the receiver to track the channel evolution blindly based on order-one statistics at a very low arithmetical complexity. Moreover, different equalisation schemes allow to choose trade-offs in the receiver ranging from low-cost/lowcomplexity/medium-performance to elevated-cost/elevated-complexity/high-performance. Suitable postfix proposals for the number of samples required for the different HIPERSPOT modes are presented in the following. The sampling frequency is assumed to be equal to the bandwidth. The postfix has been chosen to respect the following design criteria: 1. Maximum length is D samples (for values see Table 5.2) 2. Size of the OFDM symbols in the frame is N samples (for values see Table 5.2) 3. Low Peak-to-Average-Power Ratio (PAPR) value of the time domain signal 4. Minimum signal energy over unused carriers in frequency domain (minimum out-of-band radiation) 5. Spectral flatness over useful OFDM data carriers in frequency domain (SNR of channel estimates should be as constant as possible) 14
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6. Low-Complexity Channel Estimation, i.e. by postfix spectrum whose spectral contributions are mainly just phases (i.e. of constant modulus) MODULATOR X(k)
x(k)
DEMODULATOR xgi(k)
x 0 (k ) x1 ( k )
X 1 (k )
r0 (k )
P/S
S/P
[F ]−1
r1 (k )
Demodulation & Equalization
X 0 (k )
sest(k)
r(k)
bn
xn
x(t )
DAC
H(k)
r (t )
+
ADC
rn
x N −1 ( k )
X N −1 ( k )
c0 ⋅ α (k ) constant postfix
c D −1 ⋅ α ( k )
modulation
guard interval insertion
s 0est (k ) s1est ( k )
rN + D −1 ( k )
digital to analogue conversion
parallel to serial conversion
channel convolution
analogue to digital conversion
add noise
s Nest−1 (k )
serial to parallel conversion
demodulation and equalisation
Figure 5.2: : The Pseudo-Random-Postfix OFDM modulator and demodulator.
Figure 5.3 to Figure 5.10 show exemplary results of the application of the algorithms presented in [1]. Table 5.2: Parameters for prefix design. Bandwidth Mode Size of the Postfix in Time Domain Size of the OFDM symbols in the frame
20 MHz D=8 Samples N=64 Samples
40 MHz D=16 Samples N=128 Samples
80 MHz D=32 Samples N=256 Samples
240 MHz D=96 Samples N=768 Samples
8-Samples Postfix Sequence for 20MHz Mode (64 carriers)
8-Samples Postfix Sequence for 20MHz Mode
2
1.8
8-Samples Postfix Sequence
8-Samples Postfix Sequence 1.6
0
1.4
-2
Absolute Amplitude [dB]
Absolute Amplitude
1.2
1
0.8
0.6
-6
-8
-10
0.4
-12
0.2
0
-4
1
2
3
4 5 Sample Number
6
7
-14
8
Figure 5.3: Postfix in time domain (20 MHz bandwidth).
10
20
30 Carrier Number
40
50
60
Figure 5.4: Postfix in frequency domain (20 MHz bandwidth).
16-Samples Postfix Sequence for 40MHz Mode
16-Samples Postfix Sequence for 40MHz Mode (128 carriers)
2
2
16-Samples Postfix Sequence
16-Samples Postfix Sequence
1.8 0
1.6 -2
Absolute Amplitude [dB]
Absolute Amplitude
1.4
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1
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-4
-6
-8
0.6 -10
0.4 -12
0.2
0
-14
2
4
6
8 10 Sample Number
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Figure 5.5: Postfix in time domain (40 MHz bandwidth).
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60 Carrier Number
80
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Figure 5.6: Postfix in frequency domain (40 MHz bandwidth).
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32-Samples Postfix Sequence for 80MHz Mode (128*2 carriers)
2
2
32-Samples Postfix Sequence
32-Samples Postfix Sequence
1.8 0
1.6 -2
Absolute Amplitude [dB]
Absolute Amplitude
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1.2
1
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-4
-6
-8
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0.4 -12
0.2 -14
0
5
10
15 Sample Number
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30
Figure 5.7: Postfix in time domain (80 MHz bandwidth).
100
150 Carrier Number
200
250
Figure 5.8: Postfix in frequency domain (80 MHz bandwidth).
96-Samples Postfix Sequence for 240MHz Mode
96-Samples Postfix Sequence for 80MHz Mode (768 carriers)
2
2 96-Samples Postfix Sequence
96-Samples Postfix Sequence
1.8
0
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Absolute Amplitude [dB]
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0.6 -10 0.4 -12
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30
40 50 Sample Number
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-14
90
Figure 5.9: Postfix in time domain (240 MHz bandwidth).
100
200
300
400 Carrier Number
500
600
700
Figure 5.10: Postfix in frequency domain (240 MHz bandwidth).
5.1.3. HS Training Symbol Insertion The “training symbol insertion” block adds the preambles. In order to assure a maximum compatibility and to exploit the block re-use in the receiver, the same preambles proposed in [7] for HL/2 (A-field, B-field, Cfield) are used here as well for HS/C and HS/E1. In the case that the PRP-OFDM modulation is used, a so called D-field will be optionally included after the BRAN HIPERLAN/2 specific preambles: 16 zero samples
PRP postfix
16 zero samples
PRP postfix
16 zero samples
Zero
Postfix
Zero
Postfix
Zero Time
5x16 = 80 samples
A-Field
B-Field
C-Field
D-Field
OFDM data symbols Time
Figure 5.11: Additional preamble field for PRP-OFDM.
This additional training field is particularly useful during testing and system evaluation and will therefore be put into the demonstrating platform. Concerning the standard synchronisation symbols, the ones proposed in Annex 4 of [1] for higher bandwidths shall be used.
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5.2 BER Simulation Results 5.2.1. Simulation Constraints and Channel Models The complete set of simulation results is presented in [1] and its Annex 5: BROADWAY Simulation Results. Among the variety of different decoding approaches for Pseudo-Random-Postfix OFDM (PRP-OFDM), the focus is set onto the low-complexity approaches based on a transformation to Zero-Padded OFDM (ZPOFDM) combined with Overlap-Add (OLA) decoding, since this is the main candidate for the implementation of the IST BROADWAY prototype. Improved system performances are possible by applying one of the more complex decoding schemes discussed above. As an example, the corresponding performances are given for the 20 MHz bandwidth mode and QPSK constellations. For all modes, the simulations have been performed with the corresponding four fading channel models plus the reference AWGN (Additive White Gaussian Noise) channel: For the narrow-band 20 MHz mode the channel models are HS/C-A, HS/C-B, HS/C-C and HS/C-D. The remaining modes of larger bandwidth are simulated with the channel models HS/E-A, HS/E-B, HS/E-C, HS/E-D. The corresponding channels are available at very high bandwidths and are subsequently filtered at 960 MHz (a common multiple of 20 MHz, 40 MHz, 80 MHz and 240 MHz) by typical low-pass filters as defined in Annex 3: Filter design of [1] followed by a down-conversion to the bandwidth of the base-band signal. For all simulations, the channel impulse responses are normalised to power ‘1’ per channel realisation. This is important for system level simulations, since power fluctuations are simulated on the system-level. Table 5.3 gives an overview about all 8 channel models, their power delay profiles (PDPs) are given in Figure 5.12 to Figure 5.19. For more details about the models (principle, meaning of the parameters, etc.) the reader is referred to [3]. Table 5.3: Overview about HS/C and HS/E channel models. Model HSC-A HSC-B HSC-C HSC-D HSE-A HSE-B HSE-C HSE-D
Environment medium-sized room cubicled office large hall city street medium-sized room cubicled office large hall city street
LOS/NLOS NLOS LOS LOS LOS NLOS LOS LOS LOS
[dB] 0
Type tapped delay line tapped delay line modified SALEH-VALENZUELA tapped delay line tapped delay line tapped delay line modified SALEH-VALENZUELA modified SALEH-VALENZUELA
[dB] 0
HSC-A
HSE-A
-5
-5
-10
-10
-15
-15
-20
-20
-25
-25 -30
-30 [ns]
[ns] -35
-35 0
0
20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440
20
Figure 5.12: PDP for the HSC-A channel.
40
60
80
100 120
140
160
180 200
220 240 260 280 300
320 340
Figure 5.13: PDP for the HSE-A channel.
[dB] 0
[dB] 0
HSE-B
HSC-B -5
-5
-10
-10
-15
-15
-20
-20
-25
-25 -30
-30 [ns]
[ns] -35
-35 0
0
20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440
Figure 5.14: PDP for the HSC-B channel.
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40
60
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100 120
140
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180 200
220 240 260 280 300
Figure 5.15: PDP for the HSE-B channel.
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[dB] 0
[dB] 0
HSE-C
HSC-C -5
-5
-10
-10
-15
-15
-20
-20
-25
-25 -30
-30 [ns]
[ns] -35
-35 0
0
20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440
Figure 5.16: PDP for HSC-C (example realisation w/o RAYLEIGH). [dB] 0
20
40
60
80
100 120 140 160 180 200 220 240 260 280 300
320 340
Figure 5.17: PDP for HSE-C (example realisation w. RAYLEIGH). [dB] 0
HSC-D
HSE-D
-5
-5
-10
-10
-15
-15
-20
-20
-25
-25
-30
-30 [ns]
[ns] -35
-35 0
0
20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440
Figure 5.18: PDP for the HSC-D channel.
20
40
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80
100 120 140 160 180 200 220 240 260 280 300
320 340
Figure 5.19: PDP for HSE-D (example realisation w. RAYLEIGH).
In general, coverage for larger rooms is achieved in OFDM systems by using multiple transmit antennas sending the same signal at the same time which is called Single Frequency Network (SFN). The SFN models used for the simulations performed within BROADWAY are given in Table 5.4. For the principle of the model(s) and the parameters we refer the reader to [1] and [3]. Table 5.4: Overview about BROADWAY Single Frequency Network channel models. Parameter Type basic model Number of transmitters
SFN-HL/2 large hall (43×41×7m³) BRAN D
SFN-TUe-CS large hall (43×41×7m³) TUe-CS
4
4
Model SFN-TUe-ES SFN-TUD2-1 long corridor room (44.7×2.4×3.1m³) (12.4×8×3.5m³) TUe-ES TUD-LOS2 2
2
SFN-TUD2-2 room (12.4×8×3.5m³) TUD-LOS2
SFN-Correia50 canyon-like street (300×50m²) Correia50
2
4
The models are assumed to give a representative cross section of the possible environments and antenna arrangements. The model SFN-HL/2 using BRAN HL/2 channel D at 5.2 GHz is used for sake of comparative simulations within BROADWAY.
5.2.2. Selected BER Results This section presents selected results to give a global overview on the performance of the base-band ISTBROADWAY proposal. This chapter focuses on results in a static environment. Results in mobility contexts are studied and discussed in chapter 5.4. The Bit-Error-Rate performances are given only for QPSK and code-rate ½. Both the standard CP-OFDM and PRP-OFDM modulation scheme based results are presented; for CPOFDM the channel estimates are based on two OFDM training symbols at the start of the frame (similar to BRAN HIPERLAN/2 and IEEE802.11a). In the PRP-OFDM cases, the channel is estimated based on the exploitation of the postfixes only – in the context of this study the averaging window used for channel estimation is fixed to 72 OFDM symbols for QPSK. This is quite a high value which illustrates the high potential of PRP-OFDM. In practice, performance/complexity trade-offs can be applied with smaller window sizes leading to decreased performances. The simulation results on modes with 20 MHz bandwidth are presented in the following.
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Figure 5.20: BER for 20 MHz bandwidth, CP-OFDM, QPSK, Rc=1/2.
Figure 5.21: BER for 20 MHz bandwidth, PRP-OFDM, QPSK, Rc=1/2, OLA based decoder.
Figure 5.22: BER for 20 MHz bandwidth, PRP-OFDM, QPSK, Rc=1/2, MMSE decoder.
It is important to note that approx. 2 dB are gained when using the PRP-OFDM modulator (combined with an OLA decoder) instead of standard CPOFDM. This gap can be further increased if more advanced (and more complex) receiver architectures are applied as given for MMSE-based PRP-OFDM equalisation shown in Figure 5.22. As shown in [1], the PRP-OFDM modulation can also be used for 16QAM and 64-QAM channel tracking, but usually MMSE based decoding techniques are then required. In practice, it is probably more convenient just to exploit the synchronisation properties provided by the pseudo-randomly weighted postfixes of PRPOFDM and to perform channel estimation based on preambles and rotating pilot schemes.
The simulation results on modes with 40, 80 and 240 MHz bandwidth are presented in the following.
Figure 5.24: BER for 40 MHz bandwidth, PRP-OFDM, QPSK, Rc=1/2, OLA decoding.
Figure 5.23: BER for 40 MHz bandwidth, CP-OFDM, QPSK, Rc=1/2.
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Figure 5.25: BER for 80 MHz bandwidth, CP-OFDM, QPSK, Rc=1/2.
Figure 5.26: BER for 80 MHz bandwidth, PRP-OFDM, QPSK, Rc=1/2, OLA decoding.
Figure 5.27: BER for 240 MHz bandwidth, CP-OFDM, QPSK, Rc=1/2.
Figure 5.28: BER for 240 MHz bandwidth, PRP-OFDM, QPSK, Rc=1/2, OLA decoding.
The previous results show that Pseudo-Random-Postfix OFDM (PRP-OFDM) actually is a promising modification of standard OFDM: Performance increases are observed compared to standard OFDM in combination with a short CIR estimation training sequence of two OFDM symbols.
5.3 Synchronisation Enhancement 5.3.1. Preamble Based Time Synchronisation Synchronisation tasks include a rough detection of the start of a new frame, a fine time synchronisation, a frequency and clock offset estimation and compensation and a phase noise suppression. Frame detection and time synchronisation are mainly based on correlation of preambles. For frame detection, the output of the correlator is observed and compared with a threshold. If the threshold exceeds a certain value, a frame has been detected and the synchronisation process has been triggered. Within the next samples of the preamble the maximum correlation is searched. With preamble based correlation the optimal sampling point is found with a precision of ±2…3 samples. That means, an early sampling delay of two or three samples is required to prevent inter-symbol interference (ISI). For the HSC/E modes we may also use the pseudo-random postfix (PRP) for synchronisation. Then, the synchronisation can be further refined by power detection on the channel impulse response and by cross-correlation of the received and transmitted pseudorandom postfix. Both algorithms require channel estimation, which is done in a very effective way when PRP-OFDM is employed. In the framework of IST BROADWAY, it is assumed that basic synchronisation tasks, such as frame detection (i.e. when mobile terminal (MT) is switched on, it tries to identify quite roughly the start of the frame), frequency offset estimation and correction, etc. are performed based on classical synchronisation techniques. These estimators are usually based on preambles which are inserted at the beginning of a frame and which 20
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are known to both, the transmitter and the receiver. A typical preamble is presented by the following figure for the example of BRAN HIPERLAN/2 (in IEEE802.11a, a practically identical structure is used):
Figure 5.29: A typical preamble (BRAN HIPERLAN/2).
The sequence consists of three main parts (A-, B-, and C-field). According to their designated task the certain sub-sequences have special properties. Usually, A- and B- field are designed for time synchronisation, i.e. they have ''good'' auto-correlation properties. For frequency offset estimation typically the B- and the C-field are used. The channel estimation can be performed using the C-field, since it has a nearly flat spectrum. In a first time, the following sections will present preamble based synchronisation techniques. These techniques usually provide time synchronisation with an inherent imprecision of approx. +/- 6 samples. Since this imprecision requires to broaden the postfixes and thus reduces the system throughput, it is important to propose refinement techniques. As mentioned above, A- and B-field are mainly used for the time synchronisation because of their autocorrelation properties. At the receiver side the received signal is correlated with a shifted version of itself (n is the sample number, δ the shift and W the window size). In order to achieve accurate time synchronisation, the correlation should have a high peak for a certain n and otherwise it should be very low. The time synchronisation process can be divided into two parts: acquisition and tracking. When the first frame is received, it has to be detected and the optimal sampling point has to be found. In subsequent frames the optimal sampling point is only searched around the previous detected sampling point. The main steps for the acquisition are depicted as a block diagram in Figure 5.30a. The incoming signal samples are auto-correlated and the output of the correlator is compared with a threshold. If the threshold is exceeded, the synchronisation acquisition is triggered. The correlation peak is searched within the following samples. In order to restrict the probability of false alarm to a minimum, the correlation is carried out again around the expected B-field peak. If this correlation also exceeds a certain threshold, then the input stream is considered to be a regular frame. Once a frame is detected and the synchronisation is found, in the following frames the correlation peak is searched around the previous detected correlation peak. If the maximal correlation is below the threshold, the previous synchronisation point is used. If this happens again in the next frame, a new acquisition has to be performed. The block diagram of the tracking algorithm is shown in Figure 5.30b.
Figure 5.30: Synchronisation principle a) acquisition b) tracking.
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The threshold TA is mainly responsible for the frame detection performance. Note, that the phase of the correlator output can not be used as a criteria, since frequency offset is not yet compensated. If the threshold is too low, the probability of a false alarm is high. A high threshold leads to detection failures of regular frames. In order to find an appropriate threshold value, false alarm and detection failure probabilities are determined by simulations. In Figure 5.31 the curves are shown for the AWGN channel as well as for the HSC channel models as a function of the detection threshold. Simulations are done with correlation over the A- and B-field and over the A-field only. The curves for the detection failure were nearly identical and hence only one set is shown. For false alarm simulations, random OFDM symbols coming from other connected users were fed into the correlator input. A false alarm occurs if the detection threshold is exceeded. In fact, it does not really matter which channel is used, so only the results for AWGN are presented. If a regular preamble is not recognised by the correlator, a detection failure event has been occurred. The general goal is to keep both the false alarm and the detection failure probability low. However, a false alarm event is more costly, because the receiver procedure is triggered and it has to be reset and restarted. If the detection of a regular frame fails, the synchronisation can be found within the next frame. Since we do not know anything about the SNR, we have count with bad Figure 5.31: False alarm and detection failure probabilities as a function of the detection threshold. conditions. Taking these considerations into account, the threshold is set to 0.4 if A- and B-field are used and to 0.5 if only the A-field is used. Then the misdetection probabilities are below 10-3 and 10-4, respectively. Once the frame is roughly detected, fine time synchronisation is performed. This mainly depends on the correlation properties of the preamble. In [1] it was found that the A-field is the best choice for fine time synchronisation. In Figure 5.32 the histogram of the estimated starting sample in the presence of an AWGN channel is shown. A starting sample of zero is the optimal case. For low SNRs a deviation of plus or minus a few samples occurs. At a SNR higher than 10 dB the algorithm is quite reliable. In addition to the deviation coming from the noise, the diversity introduced by the multipath channel also affects the time synchronisation accuracy. The histogram of the time offset is shown in Figure 5.33. Even for high SNRs a time offset of plus a few samples can still occur. The accuracy decreases for an increasing delay Figure 5.32: Histogram of time offset (AWGN channel). spread of the multipath channel. Note, that a negative offset is caused by the noise and a positive offset occurs due the echoes of the multipath channel.
Figure 5.33: Histogram of time offset (HSC channels) a) SNR=5dB b) SNR=15dB.
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5.3.2. Frequency Synchronisation 5.3.2.1. General Issues Frequency offset estimation for the BROADWAY system concept is a bit challenging, since large frequency offsets can be encountered. With an oscillator accuracy of about 20 ppm at both the transmitter and the receiver, we have to cope with frequency offsets up to 2.4 MHz at 60 GHz. Note, that this is almost 8 carrier spacings. The estimation is performed in two steps. At first, a classical phase difference estimator is employed. Since the smallest signal period in the preamble is 16 samples, the maximum detection range of this estimator is ±625 kHz (corresponding to two sub-carrier spacings). After the correction of the estimated frequency offset an offset of more or less exactly several multiples of the sub-carrier spacing can remain. Two algorithms are proposed to detect the remaining frequency offset. A low cost solution is suggested, that relies on power detection around the zero sub-carrier and at the side-bands of the spectrum of the B-field part of the preamble. This algorithm works well for nearly flat channels, but the performance decreases with an increasing frequency selectivity of the channel. A second algorithm performs channel estimation and correlation in the frequency domain simultaneously. Thus, the fading channel does not restrict the performance of the estimator at the cost of some additional complexity. Due to non-ideal oscillators in the transmitter and the receiver the centre frequency of the RF signal can only be generated with a certain accuracy. That means the generated carrier frequency f c differs from the desired value by an offset ∆f . Introducing a frequency offset and an initial phase at both oscillators, the received signal can be written in base-band notation yn = xn ⋅ e j 2π ( ∆fTX nT +ϕTX ) e j 2π ( ∆f RX nT +ϕ RX ) = xn ⋅ e j 2π (( ∆fTX +∆f RX ) nT +ϕTX +ϕ RX ) Because in base-band we can not distinguish between a transmitter and a receiver offset, a resulting frequency offset ∆f = ∆fTX + ∆f RX can be defined, and hence
yn = xn ⋅ e j 2π ( ∆fnT +∆ϕ ) where ∆ϕ is the phase offset between the transmitter and the receiver. That means, the transmitter oscillator can be assumed to be ideal and at the receiver side the resulting frequency and phase offsets occur. As the phase offset will be treated separately through phase tracking in conjunction with phase noise correction, clock offset compensation and equalisation, it will be not considered in the following.
5.3.2.2. Frequency Offset Estimation based on Phase Differences in Time Domain As found in the previous section the frequency offset causes a linear phase shift in time domain. An easy way to estimate the frequency offset is simply to measure the phase difference between two time domain samples. This can be performed by computing the auto-correlation value of a periodic time domain signal. Assuming the signal is only distorted by a frequency offset, the correlator output is Γ=
W −1
∑ xn* xn e j 2π∆f δ T
n =0
where δ is the signal period and W is the window size. The frequency offset can easily be found mf = arg ( Γ ) 2πδ T . ∆
The signal period δ determines the range of the estimation. As phase shifts larger than π can not be detected, the estimation is restricted to frequency offsets ∆f ≤ 1 2πδ T . (5.1) If the HL/2 preambles are used to estimate the phase shift, we have several choices for W and δ. Here, we propose two possible sets, that are depicted in Figure 5.34.
Figure 5.34: Possible correlation for phase difference estimation.
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For the B-field we use W=48, δ=16 and for the C-field W=64, δ=64. According to equation (5.1), the detectable range is +/-625 kHz (two sub-carrier spacings) when using the B-field and +/-156.25 kHz (half a sub-carrier spacing) when the C-field is used. Results found by simulation and theoretical analysis in the presence of an AWGN channel are presented in Figure 5.35 and Figure 5.36 for the B-field and the C-field, respectively. At each case the mean error is plotted over the relative frequency offset ∆k = ∆f ∆f c and the CDF (cumulative distribution function) of the residual offset is shown for ∆k = 0 .
Figure 5.35: Frequency estimation accuracy using the B-field a) mean deviation error, b) CDF of the residual frequency offset.
Figure 5.36: Frequency estimation accuracy using the C-field a) mean deviation error, b) CDF of the residual frequency offset.
The CDF of the residual frequency offset gives information in how many cases the residual frequency offset is below a certain value. With the fine frequency offset estimation (when the C-field is employed) we achieve 1 % relative residual offset in 65 % and 90 % of all cases for an SNR of 5 dB and 10 dB, respectively. If the preambles are transmitted over a multipath fading channel, the mean error degrades only marginally. Also for the CDF differences are very slight.
5.3.2.3. Estimation of Large Frequency Offsets In the previous section it was mentioned that the frequency offset estimation is restricted to ∆f max = 1 ( 2δ T ) if a time domain correlation based estimator is employed. The maximal range is achieved if the B-field is used and δ is set to 16. Then, we can estimate frequency offsets up to 625 kHz (two subcarrier spacings). Assuming an oscillator accuracy of about 20 ppm at 60 GHz at both the transmitter and the receiver, we have to expect frequency offsets up to 2 ⋅ 20 ⋅ 10−6 ⋅ 60 GHz = 2.4 MHz (7.68 sub-carrier spacings). Note, that this is about four times of the detectable range of the B-field. So, further estimation algorithms are necessary.
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An initial frequency offset estimation can be obtained by a time domain correlation based estimator using the Bfield. Assuming a noiseless transmission, the estimation result for frequency offsets within -8 to +8 carrier spacings is shown in Figure 5.37. Since phase shifts larger than π can not be detected, after the correction of the estimated frequency offset it remains a frequency offset of -8, -4, 0, 4, or 8 sub-carrier spacings. We recall the FOURIER-Transformation correspondence of a convolution and a multiplication by a complex exponential in time domain F { hn ⊗ xn e j 2π n q / N } = H k − q X k − q with q integer. Figure 5.37: Frequency offset estimation result with a
That means, a frequency offset of q times the carrier phase difference estimator, B-field is employed. spacing causes a shift of q carriers in the frequency domain. Note, that the shift of the spectrum is cyclic, since the spectrum of a discrete signal is periodic with period N. In order to detect the shift of the spectrum, two algorithms are presented. The first one is based on power detection around the DC-carrier and at the side-bands of the B-field spectrum. The second one is a joined algorithm, where channel estimation and correlation of the B-field spectrum is carried out together. For a very simple detection of the frequency shift, the four subsequent +B16 fields of the preamble are treated in the frequency domain. In Figure 5.38 the (discrete) spectrum of the B-field is shown without distortion by noise or a fading channel and with distortion by channel HSC-A.
Figure 5.38: Spectrum of the B-field a) without distortion b) distorted by channel HSC-A.
If the preamble is affected by a multipath channel, the carrier magnitudes are weighted by the frequency response of the channel. In addition, some interference from the preceding A-field distorts the spectrum. Note, that the peaks of the spectrum are spaced by four sub-carrier spacings, the DC sub-carrier and some sub-carriers at the extremes of the spectrum are zero. If the frequency offset is a multiple of four sub-carriers, the shift of the DC-carrier and the shift of the leftmost and rightmost carriers can be detected by a simple logic. The magnitudes from the carriers of interest are compared with a threshold. If the magnitude is larger than the threshold we obtain a logical one for this carrier, otherwise a logical zero. The logical carrier allocation pattern for the cases that the frequency offset is a multiple of four times the sub-carrier spacing are shown in the following table. Table 5.5: Carrier allocation pattern for frequency offsets of multiple of four times the sub-carrier spacing sub-carrier number ∆f ∆f c -8 -4 0 +4 +8
-32 1 0 0 0 1
-28 1 1 0 0 0
-24 1 1 1 0 0
-20 1 1 1 1 0
-8 0 1 1 1 1
-4 1 0 1 1 1
0 1 1 0 1 1
+4 1 1 1 0 1
+8 1 1 1 1 0
+20 0 1 1 1 1
+24 0 0 1 1 1
+28 0 0 0 1 1
The logical carrier allocation values from the received B-field spectrum are compared with the patterns presented in Table 5.5. The frequency offset is detected according to the pattern with the smallest distance to the logical carrier allocation pattern. 25
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The determination of a suitable amplitude detection threshold is the goal of detection failure simulations. In Figure 5.39 the detection failure probabilities are presented for the AWGN channel and for the HSC channels at two different SNR values.
Figure 5.39: Frequency offset detection failure probabilities as a function of the detection threshold a) SNR=5 dB b) SNR=15 dB.
The optimal detection threshold strongly depends on the SNR. In order to ensure a low detection failure probability even at low SNR, the detection threshold is set to 0.6. Any SNR-adaptive algorithm would require estimates for the actual value of the SNR. The resulting detection failure probability is shown in Figure 5.40 as a function of the SNR.
Figure 5.40: Detection failure probability as a function of the SNR (amplitude detection).
Figure 5.41: Detection failure probability as a function of the SNR (correlation approach).
If the SNR is high, the curves for the fading channels become flat, i.e. the detection failure probability only depends on the channel power distribution on the interesting subcarriers. In order to eliminate the influence of the channel fading, channel estimation on those interesting subcarriers has to be performed. Therefore, we guess the spectrum is shifted by l subcarriers. Then, a pseudo channel transfer function can be calculated. The shifted received B-field spectrum is now correlated with the transmitted spectrum weighted by the guessed channel transfer function. The real part of the correlation result has a maximum for l=q. In addition, we use the fact that the B-field spectrum is zero at many subcarriers. The simulated detection failure probabilities are plotted in Figure 5.41. Compared to the first scheme this scheme works much more efficiently, in particular for frequency selective fading channels at the cost of some additional complexity.
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5.3.3. Phase Noise Issues Another parasitic error source is the phase noise due to non-perfect oscillators in the up- and downconverters. Phase drifts due to phase noise, clock offset and a residual frequency offset can have a serious impact on the system performance. Therefore, they need to be carefully tracked. The interference due to phase noise can be split into two parts. The first part contains the distortion coming from the symbol itself, it causes a rotation of all symbols by the same angle and is called the common phase error (CPE). The second part considers the interference from all other sub-carriers and causes inter-carrier interference (ICI), it can be considered as white GAUSSian noise. In order to quantify the impact of phase noise on the system performance, the spectral power density of the phase noise has to be measured. For the oscillators used in BROADWAY the phase noise mask is shown in Figure 5.42.
Figure 5.42: BROADWAY phase noise mask (from WP4-D4 [2]).
Figure 5.43: Variance of ICI with respect to carrier power due to phase noise for HS/C.
Now we observe the interference portion coming from sub-carrier l and distorting sub-carrier k. For the phase noise spectral power density given in Figure 5.42 the variance of the ICI with respect to the carrier power is plotted for the HS/C-mode in Figure 5.43 for every carrier. There it is assumed that the six leftmost and six rightmost carriers are used as guard bands, i.e. they are not contributing to the ICI. In principle the same behaviour will occur for the HS/E modes. Only the sub-carriers close to the sub-carrier under consideration contribute to the ICI. Therefore the ICIvariance is nearly constant for all sub-carriers sufficiently far away from the guard bands (i.e. with “enough” neighbouring sub-carriers). The ICI-variance reduces for sub-carriers close to the guard bands because ICI is more or less only caused by sub-carriers from one “side”. It can be concluded that the ICI power is in every considered scenario much lower than the thermal noise. That means the ICI due to phase noise can be neglected. Now let us focus on the CPE term. Considering the phase noise mask in Figure 5.42, the ratio of the variance of the CPE and the carrier power is approximately –35 dB. In the following table the required carrier to phase noise ratio (CPNR) for certain modulation schemes and certain bit error rates is shown. Table 5.6: Required CPNR as a function of the decision margin and the uncoded bit error rate on the subcarriers. CPNR (dB) BER=10-2 BER=10-3 BER=10-4 BER=10-5 BER=10-6 BER=10-7
QPSK (ϕmax = 45º = 0.785 rad) 13.33 15.45 16.91 18.01 18.90 19.64
16-QAM (ϕmax = 16.87º = 0.295 rad) 21.85 23.98 25.43 26.53 24.92 28.16
64-QAM (ϕmax = 7.69º = 0.134 rad) 28.67 30.80 32.26 33.36 34.24 34.98
The CPNR of around 35 dB does not restrict the performance of the system, i.e. an error floor will occur at a very low BER. But, the phase noise in addition with thermal noise can have a serious impact on the system performance, since the actual CPNR of around 35 dB comes into the range of the required CPNR. Thus, it is necessary to estimate the common phase error and correct it. 27
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5.4 Channel Estimation and Tracking The OFDM technique is favourable when coping with multi-path frequency selective channels. However, efficient transmission requires accurate estimation of the channel coefficients at the sub-carrier positions. In standardised wireless LAN systems this is performed by exploiting one or more pilot OFDM symbols at the beginning of each frame. The channel coefficients are then assumed to be constant for the whole duration of the frame. Though this technique allows easy implementation, it strongly limits the mobility of the communicating terminals. The 5 GHz WLAN standards, such as HIPERLAN/2 and IEEE802.11a, are designed for a mobility of the terminals of up to 3 m/s. In the 5 GHz band this amounts to a maximum DOPPLER frequency of 50 Hz. Since the DOPPLER frequency is proportional to the carrier frequency, at 60 GHz the maximum DOPPLER frequency would be already 600 Hz. This illustrates very clearly that advanced channel estimation algorithms are required in order to operate in the 60 GHz band. A common approach for channel estimation in the presence of a high DOPPLER is to multiplex pilots into the signal. A widely accepted technique is to use sub-carriers as pilot tones and spread them appropriately in the time-frequency grid, e.g. see [10]. Thus a trade-off between channel estimation quality and data throughput is adopted.
5.4.1. Pilot Tone Pattern Proposals for the HSE Modes For the HSE modes pilot tone patterns are proposed in [1]. The pilots are grouped together into sets of four elements. The proposed pilot pattern for the HS/E1-mode is summarised in Table 5.7 and the pilot tone positions in the time-frequency grid are sketched in Figure 5.44. Table 5.7: Pilot tone positions for the HS/E1 mode. # OFDM symbol 1 2 3 4
Figure 5.44: Pilot tone positions in the time-frequency grid for the HS/E1 mode.
pilot positions -26 -14 2 18 -22 -6 10 24 -24 -10 6 22 -18 -2 14 26
The pilot tone positions for the HS/E2, HS/E3, and HS/E4 modes are presented in Table 5.8, Table 5.9, and Table 5.10, respectively. Table 5.8: Pilot tone positions for the HS/E2 mode. # OFDM symbol 1 2 3 4
pilot positions -52 -48 -50 -46
-44 -38 -42 -34
-30 -14 +2 +18 +34 -22 -6 +10 +26 +42 -26 -10 +6 +22 +38 -18 -2 +14 +30 +44
+46 +50 +48 +52
Table 5.9: Pilot tone positions for the HS/E3 mode. # OFDM symbol 1 -104 -96 -88 -78 2 -100 -92 -84 -70 3 -102 -94 -86 -74 4 -98 -90 -82 -66
pilot positions -62 -54 -58 -50
-46 -38 -42 -34
-30 -14 +2 +18 +34 -22 -6 +10 +26 +42 -26 -10 +6 +22 +38 -18 -2 +14 +30 +46
28
+50 +58 +54 +62
+66 +74 +70 +78
+82 +86 +84 +88
+90 +98 +94 +102 +92 +100 +96 +104
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Table 5.10: Pilot tone positions for the HS/E4 mode. # OFDM symbol 1
2
3
4
pilot positions -312 -190 +2 +194 -308 -182 +10 +202 -310 -186 +6 +198 -306 -178 +14 +206
-304 -174 +18 +210 -300 -166 +26 +218 -302 -170 +22 +214 -298 -162 +30 +222
-296 -158 +34 +226 -292 -150 +42 +234 -294 -154 +38 +230 -290 -146 +46 +238
-288 -142 +50 +242 -284 -134 +58 +246 -286 -138 +54 +244 -282 -130 +62 +248
-280 -126 +66 +250 -276 -118 +74 +254 -278 -122 +70 +252 -274 -114 +78 +256
-272 -110 +82 +258 -268 -102 +90 +262 -270 -106 +86 +260 -266 -98 +94 +264
-264 -94 +98 +266 -260 -86 +106 +270 -262 -90 +102 +268 -258 -82 +110 +272
-256 -78 +114 +274 -252 -70 +122 +278 -254 -74 +118 +276 -250 -66 +126 +280
-248 -62 +130 +282 -244 -54 +138 +286 -246 -58 +134 +284 -242 -50 +142 +288
-238 -46 +146 +290 -230 -38 +154 +294 -234 -42 +150 +292 -226 -34 +158 +296
-222 -30 +162 +298 -214 -22 +170 +302 -218 -26 +166 +300 -210 -18 +174 +304
-206 -14 +178 +306 -198 -6 +186 +310 -202 -10 +182 +308 -194 -2 +190 +312
5.4.2. Performance Analysis in a DOPPLER Environment For the proposed pilot-tone arrangements an estimation of the channel coefficients at all used subcarriers can be performed after the reception of four successive OFDM symbols. The channel is assumed to be as long as the guard interval and the power delay profile of the channel is assumed to be rectangular, i.e. it is constant over the entire channel length. In Figure 5.45 the MSE is plotted over the sub-carrier index at an SNR of 10 dB. In the centre of the spectrum the MSE almost coincides for all modes. This is because of a constant pilot tone spacing in the centre of the spectrum. Towards the edges of the spectrum the MSE improves due to an increased pilot density. At the extreme edges the MSE rises up again, Figure 5.45: MSE over the sub-carrier index. but it gets only about 1 dB worse than that at the centre sub-carriers. This would not be the case if equally spaced pilot tones are used. Then the MSE rises up continuously towards the edges of the spectrum and might be very poor at the sub-carriers most apart from the centre. In the simulations it is assumed that the channel is static for the duration of one OFDM symbol. The carrier frequency is 60 GHz. In this section we present results for the HS/E1 mode. In fact very similar results can be achieved for the other modes, since the pilot tone pattern and also the postfix are composed in a similar manner. Next the MSE is considered as a function of the mobile terminal speed v for both the pilot-tone based and the PRP-based scheme. The number of considered OFDM symbols M is fixed to 20 and a filter delay of d = 2 is adopted. The latter presumption is chosen because the delay is still manageable and it may improve the performance considerably. In Figure 5.46 the MSE is plotted for mobile terminal speed of up to 100 m/s. That seems a bit unrealistic, but it demonstrates that both approaches have the potential to track the channel even in extremely fast moving environments. For each estimator the theoretical MSE is shown for an SNR of 5 dB and 15 dB using a channel with a rectangular power delay profile.
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Figure 5.46: MSE as a function of the mobile terminal speed.
Programme: IST
Figure 5.47: MSE as a function of the SNR.
Obviously channel tracking is possible with both strategies even for high mobility. In Figure 5.46 it turns out that the pilot tone scheme performs a bit better for high SNR values than PRP-OFDM whereas PRP-OFDM clearly outperforms the pilot-based approach for low SNRs. Figure 5.47 illustrates very clearly the main difference between the two channel estimation approaches. In the CP-OFDM case the MSE decreases to zero with larger SNR, while in the PRP-based case the MSE is rather independent on the SNR. Hence it offers excellent performance for low SNR but it exhibits an error floor at high SNR. That makes it very suitable for signal constellations with small size, such as QPSK. If the goal is to transmit with high constellation size, such as 64-QAM, then the PRP based approach might fail and pilot tone based channel tracking is the superior technique. In a nutshell, it can be stated that PRP-OFDM based channel estimation is very suitable for low-SNR contexts, e.g. when lower-order constellation types are used over a large bandwidth and the transmitter power is very limited. This is the typical scenario of a system in order to achieve the maximum range, e.g. BPSK or QPSK constellations combined with the 240 MHz bandwidth modes in IST-BROADWAY (at a given output power and a fixed data-rate the resulting range is better compared to a narrow-band system where more power is spent on a few carriers and higher-order modulations are applied). At higher-order constellation contexts, PRP-OFDM is still kept as the proposed modulator in the IST-BROADWAY system definition, since the time synchronisation can be improved based on PRP-OFDM exploitation techniques. For decoding, channel estimation does not necessarily need to rely on the PRP-OFDM postfixes, but can also be done exploiting the rotating pilot schemes. Then, the postfixes must be suppressed and an OLA operation has to be performed and the resulting system performance is quasi-identical to the CP-OFDM case. This opens the door to various complexity/performance trade-offs in the receiver which are not available in the pure CP-OFDM context.
5.5 BROADWAY HIPERSPOT demonstrator The hardware demonstrator will support most of the blocks listed above and will be developed in two steps. In a first step, the compatible mode is implemented and fundamental tests are performed at 5 GHz and 60 GHz carrier frequencies. Compared to BRAN HIPERLAN/2, in particular a new advanced frequency offset estimation algorithm is implemented as detailed in section 5.3.2. In a second step, more advanced HS/E blocks are implemented, in particular the Pseudo-Random-Postfix OFDM (PRP-OFDM) modulator and demodulator will be tested in practice. In both cases, the functionalities will be demonstrated first in a digital loop-back configuration, i.e. the digital-to-analogue converters (DACs) and analogue-to-digital-converters (ADC) will be connected by a cable without considering the RF front-end. In a second step, the RF front-ends will be connected to the configuration. The HIPERSPOT base-band implementation will be entirely implemented onto the FPGA (field programmable gate array) present on the development platform and will be controlled by registers via the PC. For the demonstration of the functionality and performance of all blocks, a unidirectional configuration is sufficient and the demonstrator will therefore be developed as such.
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5.5.1. Demonstrator The Demonstrator is meant to demonstrate HS/C (HIPERSPOT’s BRAN HIPERLAN/2 compatible mode) functionalities at 60 GHz. In particular, the following configuration is planned: • HS/C mode with all BRAN HIPERLAN/2 functionalities • unidirectional connection of one transmitter and one receiver The main physical layer parameters are resumed in the following. All parameters that are not defined below are as presented in the BRAN HIPERLAN/2 standard [7]. Table 5.11: Main parameters of phase-1-demonstrator. Parameter Modulation Bandwidth Number of sub-carriers Constellations I/Q separation RX: Synchronisation features RX: Equalisation RX: FEC decoding
Value Cyclic Prefix OFDM (CP-OFDM) 20 MHz 64 in total, 48 data carriers, 4 pilot carriers BPSK, QPSK, 16-QAM (optional) Digital I/Q separation Time & frequency synchronisation, channel estimation Zero Forcing (ZF) equalisation VITERBI based decoder
The planned transmitter and receiver base-band architectures are resumed in the following by Figure 5.48 and Figure 5.49. binary data
Scrambler
FEC coder & Puncturing Large CC
Mapper & Normalisation
Interleaver 1 => n Q I
I I
Pilot & Zero Insertion
Q
IFFT*
I Q
Guard extension (CP-OFDM)
I Q
Digital I/Q treatment
Training symbol Insertion
40 MHz signal
Q
Figure 5.48: TX architecture of phase-1-demonstrator (PHY).
I Digital I/Q separation
Q
I
Time/ Frequency/ Phase Offset Compensation
I Q
Suppression of Cyclic Prefix (CP-OFDM)
I Q
FFT (64-Point)
I Q
Equalisation I
Q
Q Synchronisation & Channel estimation (C-Field based)
binary data
De-Scrambling
VITERBI decoding
Metric Calculation
De-Puncturing
De-Interleaver
De-Mapping n => 1
Figure 5.49: RX architecture of phase-1-demonstrator (PHY).
5.5.2. Behaviour of the RX design with a standard CP-OFDM demodulator The initial testing of the demonstrator’s VHDL-code is entirely done in the MODELSIM simulation environment. Here it is possible to verify all internal signals and to show that the design actually works. Emphasis is laid on the PRP-OFDM implementation which is one of the most innovative parts of the demonstrator. Prototype-based measurements will be given in the context of the deliverable D16 "Final BROADWAY Baseband Description and Evaluation Document". For sake of simple verification of the result, an all-zero sequence will be fed into the transmitter. This will still lead to quasi-random OFDM signals due to the scrambling block. It is thus the goal to find in the receiver this all-zero sequence again. With these tests finalised, the next step is the validation of the system on the hardware platform. The results will be illustrated in the deliverable D16 "Final BROADWAY Baseband Description and Evaluation Document". 31
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5.5.2.1. Transmitter outputs The all-zero bit-stream entering the TX is encoded based on BPSK symbols. The resulting time domain outputs of the TX hardware implementation are illustrated by Figure 5.50.
OFDM Data Symbols Preambles
Figure 5.50: CP-OFDM TX outputs.
Here, it is interesting to note the quite structured preamble-sequence. The OFDM data symbols, however, rather look like noise - as it should be.
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5.5.2.2. Equalisation results After equalisation we expect to find the initial BPSK-constellations again. Figure 5.51 illustrates the results. The real part of the equalized signal is clearly a BPSK sequence. The weighting from the middle to the outside is due to the digital I/Q separation filters.
Figure 5.51: CP-OFDM equalisation outputs.
As expected, the real part contains +/- 1 amplitudes (weighted from inside to the outside due to the digital I/Q separation filters). The imaginary part is practically zero as it should be (only some digital noise remains).
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5.5.3. Behaviour of the RX design with a novel PRP-OFDM demodulator As a conclusion from the results presented below it can be stated that the PRP-OFDM decoding block successfully transforms the PRP-OFDM symbols into standard OFDM symbols that are circularly convolved by the propagation channel vector. Thus, the sub-sequential blocks remain unchanged from the standard CPOFDM case.
5.5.3.1. PRP-OFDM based transmitter outputs A PRP-OFDM modulator simply replaces the cyclic prefix extension of standard CP-OFDM by a pseudorandomly weighted sequence. This sequence as well as the pseudo-random weighting factors are known to both the transmitter and the receiver. The resulting time domain frame (real/imaginary part) has the typical look illustrated by Figure 5.52; here, the D-Field option is included.
For testing purposes, a postfix sequence has been added. It is follwed by the OFDM data symbols.
Figure 5.52: A typical transmitted block.
Please note the quite structured BRAN HIPERLAN/2 preamble sequence before the D-Field. Following the D-Field there are the OFDM data symbols followed by the postfixes. The postfixes are hard to identify just visually.
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5.5.3.2. Equalisation of PRP-OFDM output blocks As it is explained in the PRP-OFDM Overlap-Add-Decoding (OLA) section of the WP3-D7-Release-III main document [1], it is sufficient to estimate the sum of the Inter-Block-Interference (IBI) contribution and the Intra-Symbol-Interference contribution of the postfix sequence convolved by the propagation channel. Based on these results, the suppression of the postfix convolved by the channel can be performed on the following data-symbols. This operation will be illustrated in the next section. The corresponding outputs are then fed to the standard CP-OFDM equalisation and decoding units. Figure 5.53 presents the results of the equalisation block. After the upperly mentioned PRP−OFDM related operations, a standard OFDM symbol (circularly convolved by the channel) is obtained. After equalization, the constellation points are identified. Here, a BPSK mapping has been used. This is practically perfectly obtained for the real part − the weighting of the amplitudes from inside to outside is due to the I/Q separation filters. As expected, the imaginary part is nearly zero.
Figure 5.53: Equalisation after PRP-OFDM treatment.
As expected for the applied BPSK constellation, the imaginary part is practically zero and the real part contains +/- 1 amplitudes. The slight weighting of the BPSK constellation is due to the I/Q filters - the equalisation does not divide by the channel coefficients, but performs a multiplication by the complex conjugates.
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5.6 EVALUATION OF THE BROADWAY HIPERSPOT demonstrator implementation based on a Digital-Loop-Back configuration After creating the VHDL blocks the necessary verification for the Tx and Rx follows in simulations and real hardware implementation. A result of the hardware synthesis and implementation process is the need of resources on FPGA, in particular the maximum clock frequency and the usage of logic gates. Finally the synthesized VHDL code for the base-band was tested in real hardware with the help of the loop back verification and in comparison of the VHDL simulation results. In these considerations the Rx is more emphasized because it is more complex than the Tx. Please note that the output of Tx is not really a baseband signal but a modulated signal on a low-IF (20 MHz). From the view of the high-IF modulation within the RF blocks this IF is very low so the following verification is called base-band loop-back.
5.6.1. Simulation and synthesis of the Tx To control the Tx within the ART-Board a PC-software (see Figure 5.54) was developed. It allows easy configuration of an OFDM frame, which was very helpful for the following tests. The software communicates with the FPGA on ART-Board via the PCI interface with the help of a driver.
Figure 5.54: User interface of the Tx.
To minimize the effort of data transferring to the FPGA the Tx gets only zeros on its input. That approach is possible because the following scrambler block alters the zero data stream to a pseudo random data stream. That simplifies also the validation of the Rx, because there only a comparison of its output with zero is necessary. The Tx hardware was verified on the basis of its low-IF output signals. E.g. the cyclic prefix of 36
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the first data field is shown in Figure 5.55 for the simulation and in Figure 5.56 for the results after D/A conversion, respectively. There one can see that the Tx implemented in hardware produces the correct OFDM symbol in time domain. Problems due to the Tx’s output signal are discussed in chapter 5.6.2. The obtained usage of resources in hardware is shown in detail in Figure 5.57. The fitting tool indicated a maximum clock frequency of 62 MHz (50 MHz are required).
Figure 5.55: Simulation output of Tx in time domain.
Figure 5.56: Tx output after D/A conversion in time domain.
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Figure 5.57: Fitting results of Tx.
5.6.2. Treatment of the analog IF signal Upon verification of the VHDL code by simulation, tests of the algorithms on the hardware platform have been performed. Therefore the output of the digital-to-analog converter (DAC) at the transmitting side is connected by a cable with the analog-to-digital converter (ADC) at the receiving end. The transmitter outputs a band-pass OFDM signal with 20 MHz bandwidth in the frequency band between 10 MHz and 30 MHz. The receiver is able to sample the real band-pass signal and to convert the signal to the complex base-band after digital I/Q separation. Unfortunately the DAC and the ADC on the hardware platform do only perform the sampling, while image suppression and channel selection are implemented in the RF-front-ends. Hence, in a base-band loop-back, a separate band-pass filter is required in the transmission chain in order to suppress the aliasing effects and unwanted modulation products.
Bandpass Filter and Impedance Adaptation: As mentioned above a band-pass filter is required to suppress the signal components below 10 MHz and above 30 MHz after digital-to-analog conversion. The filter was designed as a two-stage filter, a low-pass filter followed by a high-pass filter. For each stage a 5th-order Chebychev-filter was assumed, and the design was made using a commercial filter design tool. The final filter design is depicted in Figure 5.58.
Figure 5.58: Bandpass Filter.
Table 5.12 presents the attenuation of the filter at selected significant frequencies. Table 5.12: Band-pass Filter Specification. MHz
3
5
8
10
20
30
40
DB
-50
-28
-6
-1.8
-1
-1.3
-12
In order to ensure a constant output impedance of about 50 Ohm over a large frequency range, the output impedance is adapted to the Rx as shown in Figure 5.59. 38
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In Figure 5.60 and Figure 5.61 the PDS of the received Cfield is shown without and with filtering, respectively. The suppression of the unwanted components can be clearly seen in Figure 5.61, although the unwanted components are not completely removed. The effect becomes more obvious by inspecting the constellation diagrams of received symbols. These are shown for a 16-QAM modulation in Figure 5.62 and Figure 5.63 without and with band-pass filtering, respectively.
Figure 5.59: Impedance adaptation between the band-pass-filter and the input-amplifier.
Figure 5.60: FFT of the C-Field after ADC, sampled at 80 MHz (without band-pass filtering).
Figure 5.61: FFT of the C-Field after ADC, sampled at 80 MHz (with band-pass filtering).
Figure 5.62: 16-QAM Constellation Diagram without Filtering.
Figure 5.63: 16-QAM Constellation Diagram with Filtering.
5.6.3. Simulation and synthesis of the Rx The Rx side was surveyed more closely. The following way was used to check how far the receiver’s VHDL blocks are working with the band-pass-filtered low-IF signal. On the receiver’s side the digital data after A/D conversion (sampling frequency is 80 MHz) are gathered in memory and read out by the PC. These data were used as digital input data for the Rx’s VHDL-simulations to get the assurance of logical correct working. In parallel the receiver programmed in hardware was fed with the same data. Thus that approach gave the ability to compare the simulation and the behavioural of the programmed hardware (including real 39
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signal delays) with the help of the same input data. The comparison is described in the following considerations. At first an overview about the data flow through the blocks and the produced outputs is given in Figure 5.64 (green blocks and signals are considered afterwards). Digital I/Q separation
sample_re sample_im
channel_re
cfield_re Frequency offset comp.
cfield_im
channel_im FFT
data_re
fft_re
data_im
fft_im
Phase offset comp.
Synchro
carrier_re
sample_in
carrier_im
A/D conv.
metric_1 Descram -bler
decoded bit
Viterbi decoder
metric_1 Depuncmetric_2 turing
metric
Deinterleaving
metric
parallel /serial
metric_2 metric_3
Metric calculation
metric_4
Figure 5.64: Data flow of Rx-simulation.
Figure 5.65: User interface of the Rx.
For the tests of the Rx blocks in hardware a PC-program was developed (see Figure 5.65). Therewith it is possible to read back the data of important blocks from the receiver’s FIFOs to the PC. Furthermore the receiver can be easily configured with the given user interface.
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Digital I/Q separation The first block tested was the digital I/Q separation. It performs the down-sampling of the signal from 80 MHz to 20 MHz and the demodulation to the complex base-band. As the result of the simulation in Figure 5.66 one can see the parallelized 80 MHz input samples as well as the I/Q separated output samples with an effective sample clock of 20 MHz (the output is only enabled every second clock cycle). The outputs of the hardware block are considered in Figure 5.67. It is remarkable that the result doesn’t agree to the simulation outputs due to different shifts relating to the digital I/Q block. Because the implemented digital low pass filter has 4 stages there are 4 possible treatments. But the results differ only in a phase shift. This phase shift will be eliminated after the phase equalization of the data samples with the estimated channel coefficients in the phase offset compensation block, because the C-field for channel estimation and the data symbols are subject to the same shift relating to the digital I/Q separation block.
Figure 5.66: Digital I/Q separation in simulation.
Figure 5.67: Result of digital I/Q separation in hardware.
Synchronization Figure 5.68 shows the synchronization over the A- and B-field in simulation. One can see the rough time synchronization with help of the A-field at the point were the threshold is first crossed. After that the fine time synchronisation occurs with the recognized second peak, which is the one of the B-field. From the hardware implementation there is no equivalent feedback available. There only the information is given back that the A- and B-field time synchronization was successful (green LEDs in Figure 5.65).
Figure 5.68: Synchronization process in simulation.
Frequency Offset Compensation The simulation of frequency offset compensation block for the mean C-field is shown in Figure 5.69. As expected the frequency offset is equal to zero because Tx and Rx uses the same reference clock. The sample values are left unchanged relative to each other. The outputs of the hardware block shows Figure 5.70.
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Figure 5.69: Frequency offset compensation in simulation.
Figure 5.70: Frequency offset compensation results of hardware.
FFT The simulation results of the FFT are seen in Figure 5.71. Because there the FFT of the mean C-field was performed the channel coefficients are obtained. Afterwards these coefficients are used to equalize the data symbols in phase in the phase compensation block. The obtained channel coefficients from the hardware are shown in Figure 5.72. These are different (e.g. no real part of the FFT outputs in hardware) in comparison to the simulation due to different phase shifts of the signals after the digital I/Q separation.
Figure 5.71: FFT in simulation.
Figure 5.72: FFT results in hardware.
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Phase offset compensation Figure 5.73 shows the simulation’s signal diagram of the phase offset compensation block. Here the 4 pilot tones were used to estimate the phase offset. Furthermore the phase equalization was done via a complex multiplication of the data symbols with their conjugated channel coefficients. As expected the remaining imaginary part is almost zero because the modulation in the example was a BPSK. Figure 5.74 shows the corresponding results in hardware.
Figure 5.73: Phase offset compensation in simulation.
Figure 5.74: Results of phase offset compensation in hardware.
Metric calculation Here the weights of the phase equalized data symbols are calculated (for simulation see Figure 5.75 and for hardware see Figure 5.76, respectively). Afterwards they are used to feed the soft-decision Viterbi decoder. In case of the BPSK modulation the weights are simply calculated from the available real part of the constellation symbols.
Figure 5.75: Metric calculation in simulation.
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Figure 5.76: Results of metric calculation in hardware.
Deinterleaver The deinterleaver works block oriented. It countermands the allocation of adjacent codewords to a larger space of time. This approach has minimized the influence of burst errors during transmission. Figure 5.77 and Figure 5.78 show that the produced results for the simulation and the hardware are similar.
Figure 5.77: Deinterleaving in simulation.
Figure 5.78: Results of deinterleaving in hardware.
Depuncturing This block fills the codewords, which were punctured in Tx, with zero weight information for the decoder. Also it is not known if there was an 1 or 0 at the position. Because the coderate chosen was 1/2 no depuncturing is necessary. The stream of input weights was left unchanged. The results of the simulation and the hardware are shown in Figure 5.79 and Figure 5.80, respectively.
Figure 5.79: Depuncturing in simulation.
Figure 5.80: Results of depuncturing in hardware.
Viterbi This blocks decodes the incoming weights with the help of the soft-decision Viterbi decoding algorithm. Due to the missing magnitude equalization in the phase offset compensation block the result of this Viterbi block isn’t as well as with magnitude equalization. The reason is that different positions within an OFDM symbol are variably weighted due to the channel’s magnitude. In the case of BPSK-modulation this approach yields to reasonable results but in contrast it can destroy 16-QAM constellations completely, due to the 2 different 44
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magnitudes in the ideal constellation diagram. As expected the simulation and the hardware produces the same results (see Figure 5.81and Figure 5.82, respectively).
Figure 5.81: Viterbi decoder in simulation.
Figure 5.82: Results of the Viterbi decoder in hardware.
Descrambler As expected after descrambling the results of the simulation and the hardware were equal to zero. Therefore the function of the receiver is proved in simulation as well as in the programmed hardware for BPSK and QPSK modulation, respectively. The obtained usage of resources in hardware is shown in detail in Figure 5.83. The maximum clock frequency given back from the fitting tool amounts to 51 MHz (50 MHz was required for the signal processing blocks).
Figure 5.83: Fitting results of Rx.
5.6.4. Measurement Results The primary aim of the base-band loop-back verification was to ensure the correct functionality of the implemented system and, of course, of all subprocedures in the processing chain. These subprocedures are in particular: synchronisation, channel estimation, and equalisation.
Synchronisation and channel estimation: Let us first consider the synchronisation block. Notice that all synchronisation tasks rely on the autocorrelation of the broadcast-burst preamble, comprising an A-field, a B-field, and a C-field. In Figure 5.84 the output of the auto-correlator is shown after receiving the preamble sequence. The 45
Figure 5.84: Output of the Auto-Correlator.
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correlation peaks of the A-field and the B-field can be clearly recognised. Hence the synchronisation works reliably in an ideal situation. In the standard mode the estimation of the channel coefficients is based on the observations of the two received C-fields. In Figure 5.85 the estimated channel coefficients for the data subcarrier locations are shown. The corresponding channel impulse response is plotted in Figure 5.86. Not surprisingly the channel transfer characteristic is rather flat, and the channel impulse response is rather short. Notice that the channel impulse response merely comprises the impulse response of the bandpass filter plus some spectrum fold-over distortions.
Figure 5.85: Estimated Channel in Frequency Domain.
Figure 5.86: Estimated Channel in Time Domain.
Equalised data symbols: Let us now consider the data symbols after equalisation. Notice that in the demonstrator only phase equalisation is implemented. This is at least sufficient to demonstrate BPSK and QPSK modulation. In the following, direct outputs (with phase equalisation) from the demonstrator are presented. In addition full equalisation has been performed off-line, i.e. by extracting the estimated channel coefficients and performing the magnitude equalisation on the PC. Figure 5.87 and Figure 5.88 show a complete BPSK-modulated OFDM symbol in the frequency-domain. The BPSK modulation can be clearly seen. In Figure 5.89 and Figure 5.90 constellation diagrams for BPSKmodulated sub-carriers are presented, while Figure 5.91 and Figure 5.92 show constellation diagrams in case of QPSK modulation. It can be concluded that, as expected, the detection can be performed with high reliability. Constellation diagrams for the 16-QAM modulation are presented in Figure 5.93 and Figure 5.94. Not surprisingly performing only phase equalisation leads to misdetection of the constellation points, but however, after performing magnitude equalisation, the constellation points become distinguishable.
Figure 5.87: Received BPSK-modulated OFDM Symbol, green line: real part, blue line imaginary part (only phase equalis.).
Figure 5.88: Received BPSK-modulated OFDM Symbol, green line: real part, blue line imaginary part (full equalisation).
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Figure 5.89: BPSK Constellation Diagram (only phase equalis.).
Figure 5.90: BPSK Constellation Diagram (full equalisation).
Figure 5.91: QPSK Constellation Diagram (only phase equalis.).
Figure 5.92: QPSK Constellation Diagram (full equalisation).
Figure 5.93: 16-QAM Constellation Diagram (only phase equ.).
Figure 5.94: 16-QAM Constellation Diagram (full equalisation).
5.6.5. Conclusion The direct coupling of the Tx and Rx base-band modules yields to unusable results. But with the help of a developed analog band-pass-filter the base-band coupling produces reasonable results in case of a BPSK and QPSK modulation. Especially the receiver’s blocks were successfully verified in comparison of the simulation and hardware results. Also the aim to reach the necessary maximum clock frequency of 50 MHz for the signal processing FPGA on the base-band-platform in both Tx and Rx was achieved. It can be concluded from these measurement results that the base-band signal processing units in transmitter and receiver are correctly working. 47
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5.7 EVALUATION OF THE BROADWAY HIPERSPOT demonstrator in combination with 5GHz/60GHz RF Front-Ends The following paragraphs introduce i) the base-band platform we use for the development of the IST-BROADWAY prototype, some points on design methodology and base-band implementation choices and ii) a proposal of the RF front-end implementation including comments on the pros and cons of the inherent trade-offs. The measurement results of the transmitter/receiver chain including the RF-frontends at 5GHz and 60GHz carrier frequency are illustrated by Figure 5.95 through Figure 5.102.
Figure 5.95: Typical Time Domain Channel Impulse Response at 5GHz and 60GHz.
Figure 5.96: Typical Frequency Domain Channel Impulse Response at 5GHz and 60GHz.
Figure 5.95 and Figure 5.96 illustrate typical channel impulse responses for the 5GHz and 60GHz transmission chains sampled at 20MHz. As expected, the 60GHz time domain channel impulse response (CIR) is slightly shorter compared to the 5GHz case. The similarities between both measurements indicate that the main contributions are introduced by the RF front-end filters of the transmitter and receiver. This observation is of great importance for the system design, since the guard interval length must be chosen taking the impulse responses of the front-end filters into account.
Figure 5.97: Typical C/I for equalized and phase corrected constellations at 5GHz.
Figure 5.98: Typical C/I for equalized and phase corrected constellations at 60GHz.
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Figure 5.99: Typical equalized QAM-16 constellation for CPOFDM at 5GHz.
Figure 5.100: Typical equalized QAM-16 constellation for PRP-OFDM at 5GHz.
Figure 5.101: Typical equalized QPSK constellation for CPOFDM at 60GHz.
Figure 5.102: Typical equalized QPSK constellation for PRPOFDM at 60GHz.
Figure 5.97 and Figure 5.98 illustrate the resulting Carrier-over-Noise-plus-Interference (C/I) ratio for 5GHz and 60GHz carrier frequencies and CP-OFDM vs PRP-OFDM based channel estimation after Zero Forcing (ZF) equalization and phase offset correction (2 measurements are given for each case): for CP-OFDM, the CIR estimation is based on two learning symbols (C-Fields) and for PRP-OFDM (based on the simple Overlap-Add decoding technique) the CIR estimation is based on exploiting postfix sequences only as discussed in [11]. In the 5GHz case, the PRPOFDM window size for CIR estimation (see [11]) is set to 240 OFDM symbols - in practice, this is a large value, but it illustrates well the potential of PRP-OFDM: Several dB are gained compared to CP-OFDM at the higher carrier band. For 60GHz, the results of PRP-OFDM are slightly below the ones for CP-OFDM; these results are already obtained for small window sizes (from approx. 16 OFDM symbols on), which indicates a rather poor acquisition SNR. Corresponding BER curvers are not presented here for concision sake, but the results are close to the simulations given in [11]. These results validate the usefulness of PRP-OFDM if the target application requires: i) a minimum pilot overhead, ii) low-complexity channel tracking (e.g. high mobility context) and iii) adjustable receiver complexity/performance trade-offs without requiring any feed-back loop to the transmitter. Examples of received QAM-16 constellations at a 5GHz carrier frequency and QPSK constellations at a 60GHz carrier frequency after ZF equalization are illustrated for CP-OFDM and PRP-OFDM in Figure 5.99 to Figure 5.102.
5.8 Conclusion This paper has shown a succesful validation of the IST-BROADWAY system concept. The measured SNR values are sufficient for QAM-16 constellations at 5GHz and for QPSK at 60GHz; higher order constellations at 60GHz would require an improved RF design. Moreover, PRP-OFDM has been validated for the first time in a practical system.
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6. 60 GHz RF Front-end and Antennas 6.1 RF Concept overview The main feature of BROADWAY system is that it has the capabilities to work at 5 GHz or 60 GHz. The advantage of this dual frequency operation is the possibility to offload the data transfer to 60 GHz when requested by the customer. A dual mode 5/60 GHz architecture has been proposed for the RF front-end and is represented on Figure 6.1 below.
Figure 6.1: Architecture proposal for the RF front-end
It is described in detail in the deliverable D4 [2]. It will be based on the existing MOTOROLA HIPERLAN/2 architecture, which is based on a double down conversion process, one stage at 5 GHz and one stage at 931 MHz. Therefore the proposed architecture for the BROADWAY system includes 3 stages as stated in Table 6.1. Table 6.1: The 3 stages of the BROADWAY system RF front-end. Stage 1 Stage 2 Stage 3
LO 931 MHz 4.249 – 4.389 GHz 56 GHz
IF DC – 20MHz 931 MHz 5.18 - 5.32 GHz
RF 931 MHz 5.18 – 5.32 GHz 61.18 - 61.32 GHz
6.2 MMIC development This project was the opportunity to benchmark several commercially available Gallium Arsenide (GaAs) and Indium Phosphide (InP) processes and initiate partnership with WIN (an InP foundry) to perform the realization of our key-MMICs. Thus, four different devices have been realized: a low noise amplifier (LNA), a power amplifier (PA), a branchline mixer and multiplier, all operating at 60GHz. Unfortunately in the early process library release from WIN, the capacitors weren’t adequately parameterized: a mismatch between the theoretical and practical value has been identified and validated during the measurement campaign conducted in Motorola facilities. As a consequence only two components are candidate for packaging: the mixer and multiplier. Overview of the result by MMICs:
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Low Noise Amplifier (LNA). After the verification of the passive values and the checking of some unexpected coupling effects, some changes have been made on the test structure and extra electromagnetic simulation have been performed in order to explain the bad results obtained during the measurement campaign. These extra simulations inferred that the capacitors value did not correspond to the model we used for the simulation and due to the high sensibility of the amplifier to capacitors changes, the performance fall with the capacitor decay. The next design has been changed in order to be less sensible to passives value changes.
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Mixer. Several mixer types have been investigated and measured in the IMST facilities. The best measurement results have been obtained on versions with an LO amplifier. The Rat race mixer has the highest conversion gain but still needs more LO-power. Due to the limitations of the measurement setup, the needed LO power for the Rat race could not be made. Therefore only the Branch Line Mixer was measured: this one has shown good performance and is a candidate for integration in the demonstrator front-end. Photograph and characteristics are recalled in Figure 6.2.
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Figure 6.2: Overview of the mixer: summary of its characteristics (-a-), photograph of the device (-b).
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Power Amplifier (PA). Two separate designs have been performed: one by Motorola and one by TNO. On Motorola side, two topologies were considered to achieve the power output goals: the first is the more traditional corporate combiner and the second is a potentially more efficient approach consisting in a push-pull topology. During characterization of the PA it was discovered there were errors in the layout resulting in critical capacitors not being sized correctly. Due to this severe issue on the design no additional power performance measurements were attempted. On TNO side, two designs have been performed with respectively one and two stage. The 1-stage amplifier was the only version of the amplifier which could be measured accurately. The two stage amplifiers suffer from stability problems. Small signal measurements results where very inaccurate and during measurements the oscillations blow up the transistor. The 1-stage amplifier is working and was measured correctly. There is a frequency difference of 2GHz compared with the simulation. Nevertheless it is used for the mixers described and works fine.
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Quadrupler. The complete 4X multiplier topology will consist of 2 active FET doubler stages, along with gain stages. Individual doubler stages were designed first, and then a combined version with the interstage optimized was also completed. This way, to doubler has been designed and realized. Each of them work fine but their integration to form the quadrupler was planned for the second iteration of the process which has not been done due to the lack of time.
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Quadrupler Input frequency Output frequency Input power Output power Input VSWR Output VSWR Spurious rejection Extended frequency -b-
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Figure 6.3: Overview of the quadrupler: photograph of the last doubler (-a-) characteristics (-b-).
An overview of all designs, measurement and analysis are given in deliverable D15 (“Design, verification of the advanced multi-functional MMIC chip solution and integration/verification of the RF-FE”). This first path for the design and fabrication enabled us to perform the required modification on the overall design and libraries to be in a position to have a successful second run of foundry, which is not possible to be handled in the overall project duration.
6.3 Summary of the front-end test results The design of the 60 GHz front-end is divided into two stages: • First stage: A separate up and down converter model was produced using commercially available components. • Second stage: An integrated front-end is been designed including up and down converters, integrated antennas for 60 GHz and integrated PLDRO with external reference. This stage is not finished yet at the time of writing this document.
6.3.1. Test result for 60 GHz down-converter The down-converter proposed for this project has an LO input at 14.5 GHz. The signal is amplified after this and fed to a multiplier (×4). The output frequency of the multiplier is filtered and amplified to the level required to drive the mixer. The RF signal is amplified and the proper side-band is selected with a filter. The signal goes to the mixer and is down-converted to the IF of around 5 GHz. Figure 6.4 and Figure 6.5 show the measurement results for gain and noise figure of the down-converter, respectively. 23
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6.3.2. Test result for the 60 GHz up-converter On Figure 6.6 below the internal structure of the BROADWAY up-converter can be seen. The LO chain is the same as for the down-converter. In order to achieve the LO rejection two filters and a channel created from metal walls were used. This can also be seen in Figure 6.6.
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The measurement results for the gain and P1dB of the up-converter are presented on Figure 6.7.
6.4 Design of the integrated BROADWAY system front-end Figure 6.8 shows the proposed structure for the integrated front-end. There will be one LO chain and one integrated PLDRO. This will save space and power consumption. The antennas will be integrated in the same body.
Figure 6.8: Proposed structure of the integrated front-end.
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6.5 Antenna array design at 60 GHz & Measurements For the first iteration in the design & prototyping of the 8×8 antenna array at 60 GHz, one row of 8 patches has been realised. A configuration of one row has been selected instead of a single patch because if unexpected losses should occur (which could be the case at 60 GHz), the gain of one patch might not be sufficient for measuring the antenna properly. Measuring at 60 GHz requires packaging of the antenna array because the substrate is too thin to handle without any fortifying structure. All measurements also have to be performed in waveguide technology due to the high frequency. With respect to these two aspects, a casing has been designed by FARRAN that fortifies the substrate, and at the same time provides a stripline-towaveguide transition to connect the measurement equipment. This structure is displayed in Figure 6.9.
Figure 6.9: PCB with one patch row mounted on a casing for measurements purposes.
In this picture the strip line feeding is clearly visible as are the patches. The substrate used here is exactly the same as for the up/down-converters so that integration later on will not require any additional effort. The measurement equipment is connected via waveguide on the backside of the casing (photo on the upper right), and the same up/down-converters (kindly provided by FARRAN) are used for the measurements as later on for the demonstrator. The same casing will be used for measuring the complete 8×8 array later on so that eventual influences introduced by the casing during measurement are the same for all configurations. In order to assess the influence of the manufacturing tolerances, four prototypes have been realised and measured. The return loss and far field patterns have been determined and compared with simulation. In Figure 6.10 the return loss of all four antenna 0,0 rows is displayed. From these curves it can be concluded that the prototype number 4876 is -5,0 Simulation not functioning properly. After a quick -10,0 examination it turned out that a short circuit Meas 4875 exists at the waveguide transition. When the Meas 4876 -15,0 remaining measurement curves are compared to (dam. trans.) Meas 4877 the simulation results (red curve) some -20,0 discrepancy can be noted. Meas 4878 This is very likely caused by the waveguide-to-25,0 stripline transition which is not included in the simulation model. However, the measurement -30,0 results are adequate with respect to the 58,0 59,0 60,0 61,0 62,0 63,0 requirement profile, and show a good Figure 6.10: Return loss of the four prototypes & simulation results. behaviour. The measured and simulated far field patterns in the E- and H-plane are shown in Figure 6.11 and Figure 6.12, respectively. The measured far field patterns of the 3 functioning prototypes are very similar, therefore only one of them is exemplary shown in these two figures. One can observe that simulation and measurement agree very well, even the losses are lower than 54
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expected. The ripple on the side-lobes is caused by the influence of the casing on the near field of the patches. This casing has not been included in the simulation. Also, the finite ground plane was not considered in the simulation model, and leads to diffraction effects at its edges that contribute to the sidelobes far away from boresight. 20,00
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Summarising, one can state that the measurement of the prototypes look very promising for the final 8×8 array, and manufacturing tolerances do not influence the design noticeably. Based on the results presented here a design of the 8×8 array has already been performed and the prototyping will start shortly. This design is depicted in Figure 6.13.
Figure 6.13: Layout of the 8×8 antenna array.
Figure 6.14: Combined 5/60 GHz antennas.
In order to make the overall size as small as possible an antenna that works both at 5 GHz and at 60 GHz will be needed. Two types of such antennas are shown on Figure 6.14. The second iteration of the project was dedicated to the realization of the theoretical concepts developed in the previous paragraphs. • After successful completion of the measurements of one row of the antenna array, the design of the complete antenna array has been adapted according to latter results, which showed a very good agreement with the simulations. The antenna array has been realized (see Figure 6.15a) and measured, and again the measurements and simulation results are in good agreement (see Figure 6.15b). 55
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Two types of dual band antennas have been developed: • One type, a monopole structure, has omnidirectional coverage and is intended for base station (BS) applications. The dual band monopole consists of a radiating element (rod) and a specially shaped ground-plane. The structure is fed by a single coaxial line for both frequency ranges. For low band (exited relative to the groundplane), the rod becomes directly resonant, while for high band a major part of it has to be electrically “cut-off”. Special grooves have been manufactured into the circumference of the rod in order to act as frequency chokes for separation of longitudinal current distribution on the rod.
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The sectorial characteristics of the second type a special slot arrangement make it a preferred choice for attachment to mobile stations (MS). The dual band slot antenna consists of two in-line slot elements cut into a thin metal sheet. The structure is fed by a single coaxial line for both frequency ranges. For low band the longer slot becomes directly resonant, while for high band a major part of it has to be electrically “cut-off”. A special stub has been manufactured at appropriate position along the slot in order to act as frequency choke for separation of the longitudinal current distribution around the slot gap.
Both antenna have been realized as presented in Figure 6.16. They have been characterized in the IMST facilities and typical results obtained with the slot antennas are presented in Figure 6.17.
Figure 6.16: Photograph of the two concept of dual band antenna considered during the present year within BROADWAY.
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7. Conclusions This document illustrates that a coherent 60 GHz system study has been performed over RF, digital baseband and medium-access-control layers in the framework of the IST-BROADWAY project. From an RF point of view, a 60 GHz up-converter is available which is compatible to OFDM system baseband design constraints, in particular in terms of frequency stability and phase noise. The antenna design study closes the final gap in the analogue front-end design effort. The physical layer base-band study results include a profound analysis of the 60 GHz propagation channel and of typical RF components (in particular low-pass filters) which allow to reliably model the analogue processing and signal propagation for the base-band system design. Solutions for 60 GHz inherent problems have been proposed, i.e. the estimation and detection of large frequency offsets, the efficient estimation and tracking of the propagation channel in a high DOPPLER environment based on the Pseudo-Random-Postfix OFDM (PRP-OFDM) modulation as well as on pilot-based schemes combined with two-dimensional WIENER-Filtering. Time and frequency domain synchronisation algorithms are proposed which are adapted to the considered context. The proposal of medium-access-control mechanisms is tightly linked to the base-band system efforts. Based on efficient neighbourhood discovery schemes and ad-hoc techniques, evaluated based on Packet-Error-Rate simulation results of the PHY layer studies, the resulting system performance is illustrated within this document.
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8. References [1]
BROADWAY Deliverable “WP3-D7 Release III: Algorithm Enhancement Definition”, V1.0, 07/2004.
[2]
BROADWAY Deliverable “WP4-D4: Architecture proposal for RF front end with special requirements on dual 60GHz and 5GHz solution”, V1.0, 09/2002.
[3]
BROADWAY WP3-Study: The 60 GHz Channel and its Modelling. V1.0, 05/2003.
[4]
ETSI DTS/BRAN-0024004-2 (1999-11): “Broadband Radio Access Networks (BRAN); HIPERLAN Type 2; Packet Based Convergence Layer; Part 2; Ethernet Service Specific Convergence Sublayer'”.
[5]
ETSI EP BRAN 3ERI085B: Channel Models for HIPERLAN/2 in Different Indoor Scenarios. 30/03/1998.
[6]
ETSI TR 101 683: BRAN, HIPERLAN Type 2, System Overview.
[7]
ETSI TS 101 475: BRAN, HIPERLAN Type 2, Physical (PHY) Layer, Technical Specification.
[8]
ETSI TS 101 493-x: BRAN, HIPERLAN Type 2, Packet based Convergence Layer; Part 1 … Part 4
[9]
ETSI TS 101 031: BRAN, HIPERLAN Type 2, Requirements and architectures for wireless broadband access.
[10] MORELLI, M.; MENGALI, U.: A Comparison of Pilot-Aided Channel Estimation Methods for OFDM Systems. IEEE Transactions on Signal Processing, Vol. 49, No. 12, December 2001, pp. 3065-3073.
[11] MUCK, M. ; De Courville, M. ; Debbah, M. ; Duhamel, P..: A Pseudo Random Postfix OFDM modulator and
inherent channel estimation techniques. GLOBECOM conference records, San Francisco, USA, December 2003
[12] MUQUET, B.: Nouveaux schémas de réception et décodage pour les systèmes OFDM sans fil avec préfixe cyclique ou zero-padding, PhD thesis, Ecole Nationale Supérieure des Télécommunications, Paris, 2001
[13] OIKONOMOU, K.; NTAGKOUNAKIS, K.; VAIOS, A.; ZINELIS, N.; STAVRAKAKIS, I.: "Layered Architecture and Modules of CANA Supporting Dual Mode HiperLAN/2", International Workshop on Wireless Ad-hoc Networks 2004, Oulu, Finland, May 31st - June 3rd, 2004.
[14] OIKONOMOU, K.; VAIOS, A.; SIMOENS, S.; PELLATI, P.; STAVRAKAKIS, I.: "A Centralized Ad-Hoc Network Architecture (CANA) Based on Enhanced HiperLAN/2", The 14TH IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2003, Beijing, China, September 7-10, 2003.
[15] VAIOS, A.; OIKONOMOU, K.; ZINELIS, N.; NTAGKOUNAKIS K.; STAVRAKAKIS, I.:"On Supporting Dual-Mode HiperLAN/2: Architecture and Overhead", 13th IST Mobile & Wireless Communications Summit 2004, June 27-30, Lyon, France.
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