5.10

Solid-State Logic Elements

FY

On-Off

A

P. M. KINTNER

(1970)

R. A. GILBERT

(1985, 1995, 2005)

AND

Z

OR

Z

NOT

A

B A B A

Flow sheet symbol

Components:

Size: 0.5 in. 1 in. 0.5 in. Type: TTL, CMOS, NMOS Power: ± 12 V DC, 5 V DC Terminals: Solderable pins

Chassis Mounts:

Size: 2 in. × 1 in. × 1.8 in. Type: CMOS, thick film hybrid circuits Power: 12 V DC, 24 V DC, 48 V DC, 12 V AC, 24 V AC, 120 V AC Terminals: Plug-in modules

Single Boards:

Size: 8 in. × 12 in. × 1 in. Power: Input—120 V AC; output—5 V DC, 12 V DC, 24 V DC, 120 V AC Terminals: Stand-alone unit (RS-232 option)

Costs:

Components: $0.50 to $40; chassis mounts; $45 to $150; single boards: $60 to $560.

Partial List of Suppliers:

(Note: A = components, B = chassis mounts, C = single boards) Amtex Electronics (www.amtex.com.au) Action Instruments (www.actionio.com) (C) Analog Devices (www.analog.com) Omron (www.omron.com) Opton22 (www.opto22.com) Omega Engineering (www.omega.com) Magnecraft/Struthers-Dunn (www.magnecraft.com) International Rectifier (www.irf.com) (B,C) Carlo Gavazzi (www.carlogavazzi.com) Crydom (www.crydom.com) (B) Texas Instruments (www.ti.com) ON Semiconductor (www.onsemi.com) Intersil (www.intersil.com) Fairchild Semiconductor (www.fairchildsemi.com) Toshiba America (www.toshiba.com/taec/) STMicroElectronics (www.st.com) National Semiconductor (www.national.com) (A)

INTRODUCTION With the advent of semiconductor technology and subsequent hybrid device fabrication techniques, solid-state logic devices have undergone dynamic application changes in the past 10 years. Today, it is common to have a sensing element directly coupled, if not integrated, to input logic operations and output logic process condition requirements. It is also now possible to employ “smart” solid-state logic elements that function as stand-alone control loops.

These integrated circuits (ICs) perform control switching operations without moving parts. Their advantages are: (1) high switching speeds, (2) life independent of the number of operations, (3) operation unaffected by dirt and certain corrosive atmospheres, (4) small size, and (5) low power consumption. They make the process variable measurement, examine that sensor data according to specific logic expectations, and then decide what, if any, alteration in the device output signal should be provided. Their disadvantages are: (1) sensitivity to electrical interference, (2) 1015

© 2006 by Béla Lipták

1016

PLCs and Other Logic Devices

lack of input/output isolation, and (3) low power output driving capabilities. These mini distributed control systems reduce the information noise that is forwarded to the process controller, provide an average or logic filtered response to a process variable disturbance, and greatly enhance the performance and speed of the entire process control loop. This section will briefly discuss the fundamental engineering science principles required to apply the analog, digital, and logic components of solid-state logic technology.

Collector N Ib +

Ic Base

P

+

N

−

C

B

−

Emitter

Input circuit

E

Output circuit (a)

(b)

ANALOG CIRCUIT ELEMENTS Although modern solid-state logic devices completely incorporate any required analog, digital, and logic circuits elements, instrumentation and controls personnel are still required to interpret circuit and function diagrams that contain isolated circuit elements as they relate to solid-state device implementation. These elements include resistors, capacitors, inductors, diodes, transistors, and operational amplifiers. Many common solid-state logic device control applications include external resistors, capacitors, and diodes. These elements as well as switching transistors are discussed below. The resistor represents the simplest and most basic auxiliary component in a solid-state control circuit application. It is used for its ability to lower the potential, voltage, as electrons pass through it. Although the reader is encouraged to explore resistance, resistivity, and Ohm’s law, from a digital circuit control’s application perspective, an appreciation of the voltage drop concept is particularly useful. Figure 5.10c illustrates this point. A P-N junction is formed by joining a small amount of p-type semiconductor material to a small amount of n-type material. Transistors (Figures 5.10a and 5.10b) are formed by the combination of two P-N diodes. PNP or NPN transistors differ from each other in the positions of the p and n layers and the polarity of the applied voltages and in the directions of the resulting current flows.

Ic P Ib

−

Base

N

−

P

+

+

C

V(a) = VT [R1/(R1 + R2)]

5.10(1)

V2

R1 E

Output circuit

VT

(a) R2

(b)

FIG. 5.10a Combination of P-N junctions into a transistor. (a) Arrangement for the PNP transistor. (b) Commonly used circuit symbol for PNP transistor.

© 2006 by Béla Lipták

Figure 5.10c depicts the basic structure of a PNP transistor switch. The figure exemplifies several points to be presented in this section. However, initially the focus is on the voltage drop concept. The left side of the diagram shows a serial connection between two resistors, R1 and R2, and a parallel connection between R2 and a set of normally open contacts, PSL 21. The figure indicates that there is a total voltage drop, VT , when current flows between the node point above R1 to the node point below R2. The discussion of this serial resistor and parallel contact often includes the terms voltage divide and pull up resistor. Both terms reflect the Ohm’s law relationship that the sum of the voltage drops across R1 and R2 equals VT but each term reflects a different perspective of the node point, (a), located between R1 and R2. The term voltage divide brings the reader’s attention to node point (a). The voltage at this point is determined using the voltage divide equation shown here as

B

Emitter

(a)

Transistor Switch

where the resistance ratio in the brackets is known as the voltage divide ratio. If, for example, the two resistors have the same value, then the voltage at the node point (a) would be one-half of the total voltage drop, VT .

Collector Input circuit

FIG. 5.10b Combination of P-N junctions into a transistor. (a) Arrangement for the NPN transistor. (b) Commonly used circuit symbol for NPN transistor.

V1

R3 r PNP ollecto C I IB C VCE Base Emi tter

PSL 21

FIG. 5.10c Voltage divide example in a PNP switching circuit.

VOutput

5.10 Solid-State Logic Elements

Reverse bias

Forward bias (+)

(+)

(−)

V1

V2

V1

V2

No current flow

Current flow (+)

(−)

Nonconducting region (−)

R4

Current flow

R6

Voutput

V+

(a) Input a

Voltage threshold value

VNode Conducting region

r

ecto

oll NPN C

R6 Base Emitt er

(+)

Voltage difference across diode terminals V1 and V2

FIG. 5.10d Diode voltage bias versus current characteristic curve.

The term pull up resistor draws attention to the fact that the voltage at node point (a) is higher than the voltage at the node point below R2 as long as contact PSL 21 remains open. R2 is now identified as a pull up resistor. The use of pull up resistors is very common in solid-state control circuit applications, and their role is to ensure a desired reference voltage at a specific input or output in the digital circuit. Diodes and Their Switching The diode represents the simplest semiconductor device digital control circuit element. It is formed when a small amount of p-type material and a similarly small amount of n-type material are joined to produce a single interface known as a P-N junction. Such a junction provides a comparatively low resistance for one direction of current flow and very high resistance for the flow of current in the reverse direction. The diode circuit symbol representations are illustrated in Figure 5.10d. The figure shows the voltage assignments that define the reverse and forward bias conditions for a diode. If the voltage polarities depicted on the diode on the left side of the diagram are imposed, the diode is reverse biased and in a nonconduction mode. No current flows when a diode is reverse biased. The figure also presents the current versus voltage across the diode plot. This graph indicates that the current increases rapidly after a small threshold of voltage is exceeded. A simplified diode switching application is presented in Figure 5.10e. The circuit translates the digital sensor voltage input signals to a control output voltage delivered across R6. In this case, the voltage divide provided by R4 and R5 creates a reference voltage, Vnode, that defines the bias on the two diodes. If a voltage lower than Vnode is applied at Input a or Input b, the respective diode becomes forward biased, current flows, and a voltage drop across R6, Voutput, results. Thus, any control action generated by Voutput occurs when either or both of the input sensors present the low signal to the circuit’s respective input port.

© 2006 by Béla Lipták

1017

Input b

(b) R5

FIG. 5.10e Circuit elements for a diode-transistor logic device.

Transistors The transistor represents the simplest multiple junction semiconductor device employed in control logic element applications. Transistors are formed by the combination of two P-N junctions and contain two circuits: emitter-to-base and emitter-to-collector. The emitter-to-base circuit is generally referred to as the base circuit, and the emitter-to-collector circuit is known as the power, or output, circuit. The right section of Figure 5.10c shows a PNP transistor with its terminals appropriately labeled. The manufacture and internal composition and action of the transistor is interesting but not of immediate value to the instrument engineer. However, three general characteristics (which can be observed by external measurements) are significant for logic applications or switching actions: 1. The emitter-to-base circuit controlling I B in Figure 5.10c closely resembles a diode. 2. The emitter-to-collector circuit functions as an open/ close switch. 3. The switch is open and the transistor is not conducting, IC is zero, whenever the voltage difference between the emitter and the base is zero or whenever the emitter-to-base circuit is reverse biased. Figure 5.10c illustrates a PNP transistor circuit as an interface to a low pressure-sensitive switch, PSL 21. Because of various design considerations it is usually desirable for the transistor to be conducting when no signal is applied and to stop conducting when a signal is applied. Resistors R1 and R2 together with the normally open contact PSL 21 provide this function for the circuit. If properly selected, R1 and R 2 generate the appropriate potential value at the base to yield full conduction in the emitter-tocollector circuit. In this state, I C is at its maximum value.

1018

PLCs and Other Logic Devices

The closing of contact PSL 21 alters the voltage at node point (a) enough to open the transistor, drastically reduce the value of I C , and thus bring Voutput to 0 V. The proper selection of R 2 and R 3 depends on an understanding of the concept of saturation voltage. Examination of Figure 5.10c easily confirms that the voltage drop across the transistor, the collector voltage, V CE, is defined as VCE = VT − IC R3

5.10(2)

where I C R 3 is the voltage drop, V output, generated when the PNP collector current, I C, is not 0. Since I C is related to the base current, I B, by IC = β I B

5.10(3)

with β defined as the amplification factor, VCE can now be expressed as VCE = VT − β I B R1

5.10(4)

The base current changes as a function of the voltage divide network that contains R1 and R2. As the potential at the transistor base is made more negative, I B increases and V C decreases to a minimum value. This minimum value, called the saturation voltage, is less than 0.2 V for typical switching transistors, and the effective resistance between collector and emitter at saturation is accordingly small (on the order of a few ohms). By contrast, when IB is reduced to 0, the collector-to-emitter resistance is that of a reverse-biased or nonconducting diode and is in the region of millions of ohms. The collector-to-emitter circuit operates to open and shut under the control of IB with the output voltage, Voutput, switching off and on accordingly. Figure 5.10e also presents a transistor that interfaces input signals to a control output voltage. In this situation, the transistor is an NPN type that fundamentally operates the same way as the PNP transistor in Figure 5.10c. In both cases, the emitter-to-collector power circuit is turned on or off, and this maximum or minimum Voutput value switching action depends on the flow of current in the emitter-to-base circuit within the transistor. For the diode application in Figure 5.10e, the emitter-tocollector power circuit conducts and develops the desired V output value when the process variable input signal forward biases either or both of the diodes. In this particular application, the process variable signal can be analog or digital, because the bias threshold voltage of the diodes determines the switching action. In fact, the diodes perform a rudimentary but effective analog-to-digital signal conditioning that allows an analog sensor to also operate as a limit alarm. INTEGRATED CIRCUIT ELEMENTS The term integrated circuit reflects the fabrication process that puts the functions of transistors, diodes, and resistors

© 2006 by Béla Lipták

into a layer-constructed device. Before considering switching and logic applications for integrated circuits, the nature of the switching operations themselves will be defined. The general requirement for logic devices is that they generate on–off output control signals from on–off input signals in a way dictated by a logic operation. From a positive logic perspective, the five elementary and basic logic operations are: 1. 2. 3. 4. 5.

AND: The output is on if all inputs are on. OR: The output is on if one or more inputs are on. NOT: The output is off if the input is on and vice versa. NOR: The output is off if one or more inputs are on. NAND: The output is off if all inputs are on.

Figure 5.10e represents a simple example of an individual component circuit that can be fabricated as an integrated circuit. For this specific example, the IC package would have five terminals available to the user with no access to the transistor or any of the individual resistors or diodes. Two of these terminal are reserved for the power and ground for the package, the third terminal provides access to Voutput, while the remaining two terminals are assigned to Input a and Input b. The reader is encouraged to review the overall function of the circuit in Figure 5.10e to confirm that it would perform an OR logic operation if the input signals were inverted before they were presented to the diodes. Families of IC Switching Although the fabrication of integrated circuits is not of immediate interest, it is important to appreciate that the technology options influence the applications. There are four main families of integrated circuit switching in common use for control: 1. 2. 3. 4.

RTL (resistance-transistor logic) DTL (diode-transistor logic) TTL (transistor-transistor logic) HLL (high-level logic)

RTL was the first type of switching logic produced in integrated form. It basically replaced component circuits that were simple combinations of resistors and transistors. The primary advantage of this technology over its separate component equivalent is the size and reliability bonus that accompanies the integration process. If the OR circuit in Figure 5.10e was manufactured as an IC, it would be an example of DTL technology. The major impact of integrated circuits accompanied the development of TTL technology. TTL devices have high switching speeds and are now common to most digital instrumentation and control applications. Table 5.10f is a summary of technology characteristics.

5.10 Solid-State Logic Elements

14 13 12 11 10 V+

TABLE 5.10f Integrated Circuit Characteristics

(d)

Type

Resistance to Noise

Switching Speed

Cost

RTL

Poor

Fair

Low

DTL

Fair

Good

Medium

8

9

14 13 12

(a)

TTL

Good

High

Medium

HLL

Excellent

Low

High

1

Some examples of TTL packages are provided in Figure 5.10g, which shows the pin configuration for the 7400, 7404, 7408, and the 7474 TTL packages. The 7400 and 7408 are know as 2 input quad NAND and 2 input quad AND packages, respectively. The 7404 is a hex inverter package while the 7474 is a dual D-type positive edge triggered flip-flop. The four NAND devices in the 7400 and the four AND devices in the 7408 operate independently of each other. For example, if the proper operating voltages are applied to pins 14 and 7, a high input signal, logic “1,” on pin 1 and pin 2 of the 7408 will generate the logic “1” signal on pin 3 independent of the signals that may be present on pins 4, 5, 9, 10, 12, or 13. A similar statement is true for the 7400, with the exception that the logic “0” signal is generated on pin 3 of the

(b)

2

3

4

5

14 13 12 11 10 V+

9

(d)

6

V− 7

8

7474 1 2

(c)

(f )

(b) 3

4

5

6

V− 7

Vpull up

Logic “0” on input pin 14 will put logic “1” on pin 13.

NO 14 Set

D

TSL

Q

Pressure and temperature process variables may influence logic signal at pin 13.

13 Process action Logic “1” on output pin 13 will start process action

7474 Q 1

12

Ck Clear

Digital pulse at clock pin, pin 1, will trigger the copy of data from D to Q.

3

Logic “0” on input pin 3 puts logic zero on pin 13.

R8 Vpull up

NC

Override PB

Human interaction at pin 3 or pin 1 changes the logic signal at pin 13.

FIG. 5.10h Process variable sensors and pushbutton interface to a 7474 positive edge flip-flop.

© 2006 by Béla Lipták

8

(e)

(d)

(a)

(b)

(c) V−

1

2

3

4

5

6 7

7400. Each inverter in the 7404 also operates independently. The logic “1” signal on pin 1 produces a logic “0” signal on pin 2 even though a logic “0” signal on pin 3 will simultaneously produce a logic “1” signal on pin 4.

R7

2

10 9

7

FIG. 5.10g Pin configurations for the 7400, 7404, 7408, and 7474 TTL logic devices.

Logic signal at input pin 2 will be copied onto pin 13 when a pulse edge appears on the clock input. Start PB

PSL

6

7404

(a) 2

8

Q Q (b) Set Ck Clear D

V+ 3 4 5

14 13 12 11 V+

7400

1

11 10 9 V−

Q Q Set (a) Ck D Clear

(c)

7408

1019

1020

PLCs and Other Logic Devices

APPLICATIONS

Time Synchronization

To illustrate the utility of integrated circuit devices, two simplified applications will be discussed.

Figure 5.10i presents an example of a data acquisition logic control circuit (sheet I) that deals with a designed time-dependent presentation of a logic signal for a control action. The simplified circuit depicts one of several sheets that describes the complete control scheme. Sheet I suggests a complicated scheme that uses four sensor input signals to direct two output control signals, M2,I-5 and P-2,I-6. The control scheme uses devices in single NAND and OR packages and a single 555. The 555 provides a pulse duration feature that is initiated by the proper combinations of the input signals. The 555 integrated circuit is a popular device (see Section 5.13) when adjusted pulse duration situations are required. The 555 is not a TTL device but is TTL compatible and is often used with TTL control circuits. For this application, pin 3 provides, on demand, a logic “1” signal for a time determined by the R10 C10 circuit associated with pins 6 and 7. The output signal on M-2,I-5 is directed to sheet M as input 2, where it will activate an analog-to-digital conversion of a process variable measurement as shown in sheet M. The time needed to accomplish that conversion is provided by the extended logic “1” signal delivered to pin 12 on NAND device (d). To ensure proper transfer of the digitized variable value to its computer-based data logging system, a delayed signal to the data logger is provided to sheet P-2 via the R11 C11 circuit associated with output P-2,I-6. The presentation of the data acquisition logic signal at pin 12 of NAND (d) depends on the signals that are delivered to the other 7400 NAND devices. All of these devices are operating as gates, with pins 2, 4, 13, and 9 serving as gate pins. The reader may wish to review Figure 5.10i to confirm that the proper signals will not be presented to M-2,I-5 and P-2,I-6 unless input I-4,C-3 is at logic “1.” In addition, inputs I-1,B-4 and I-2,D-2 as well as I-4,C-3 must be at logic “0.” The diodes and inverter in line I-2,D-2 are needed to condition the signal arriving from an input circuit as documented in sheet D output 2, and the pull up resistor, R 9, together with the flip-flop action of AND device (a) and AND device (b) ensures that the output of the 555, pin 3, is off unless I1,B-4 is really at logic “0.” The use of the 555 to control the duration of the logic signal presented to pin 12 of NAND device (d) emphasizes the range of skills instrumentation and controls personnel may have to master. In this specific situation, a 74121 is a TTL device that, on first glance, could be a substitute for the 555. However, the pulse duration requirement for this application is better suited when the 555 is used. In general, Section 5.10 is presented from an application user perspective. The section provides information that introduces solid-state elements, reviews fundamental electronics concepts, and facilitates the interpretation of application circuits but does not cover the specific electrical and electronic considerations and details if the task is to actually design the circuit, as compared to designing or interpreting the control task.

Merging Human and Instrument Inputs Figure 5.10h presents a function diagram that shows how logic devices can merge the human and instrument input requirements of a control scheme. The 7474 solid-state logic flip-flop element shown is an integrated circuit that combines NAND and AND circuits to perform a specific switching operation at its outputs. The logic on pin 13, the Q output, will be at logic “1” or logic “0” depending on the signals at inputs 1, 2, 3, and 14. The logic signal on pin 12 is always the opposite of that presented to pin 13. The rules of operation for the 7474 are also provided in Figure 5.10h. As suggested, the utility of the 7474 resides in its ability to combine the logic of human and process sensor inputs to direct a switching control action. The function diagram suggests an application that involves a process action that depends on the condition of two process variables, temperature and pressure, as well as human interaction with pushbutton inputs. The diagram indicates that a human override decision has priority over the process variable information. If the override pushbutton is engaged, a logic “0” is generated at the Q output and the process action will not be allowed to continue. For this simple example, it is predicated that the temperature and pressure will not remain above their alarm values if the process action is discontinued. If that were not the case, an AND device could be added to the control scheme as a gate for the clock pin. The logic state at pin 13 would be fed back to serve as the gate pin signal on the AND. The AND rather than a NAND would be selected as the gate device, because a negative edge will be generated by the AND when the gate pin goes to logic “0.” The negative edge delivered to pin 1 ensures that the logic state at pin 2 will not be transferred to pin 13. This removes the possibility of a logic “1” signal on D immediately replacing the override generated logic “0” signal on Q. The process action is started or restarted when the active low start pushbutton is engaged. At this point, the Q output is at logic “1” and will remain in that state when the start button is released. If the override pushbutton is not engaged, the process action will continue until both of the active low sensors detect that the respective process variables have dropped below their low-level limit values. Again for simplicity, in this example, it is assumed that upon start-up the temperature and pressure immediately rise above alarm levels. In most applications this will not be the situation. For this example, one way to adjust to such a temperature or pressure lag is to use the AND gate discussed above and extend the time the gate pin detects the logic “0” signal.

© 2006 by Béla Lipták

5.10 Solid-State Logic Elements

Vpull up 9

Vpower

1

8

(d)

1021

8

R9

5

6

(b)

I-1, B-4

2 On

R10

4 7 555 3

2

C10

7400 (a)

(+)

5

(c)

12

I-3, A-1 11

(f )

(d)

Sheet I data acquisition logic control circuit

(b)

11

M-2, I-5

13

10 3

12

10

(−)

5

4

13 (e)

6

I-4, C-3

Off

3

1

I-2, D-2

6

(c)

4

8

7404 1 (a)

R11 2

P-2, I-6

C11

9 (−)

FIG. 5.10i 7400, 7404, and 555 interface for time synchronization for data acquisition.

For example, although the function diagram in Figure 5.10i does not violate any fan-in or fan-out device restrictions, voltage and current input and output characteristics are not provided, and the fan-in and fan-out requirements associated with the inclusion of the 555 into a TTL application are not discussed. There is no attempt to discuss the resistor and capacitor values needed to build the circuit for this application. Nor is there any focus beyond awareness of the specific diode signal conditioning requirements for this circuit.

IMPLEMENTATION OPTIONS Although it is clear that integrated technology takes less space and is considerably faster than its original relay logic counterparts, there are several choices in implementing this relay replacement technology. The initial choice of solid-state logic elements over mechanical relay elements is a matter of economics and requirements. In general, solid-state elements are indicated when any of the following factors are important: 1. The switching speed requirements are high (above 100 per sec). At such speeds, the life of an ordinary relay is limited to a few hundred hours.

© 2006 by Béla Lipták

2. The system requirements are complex, involving a large number of elements for implementation. 3. The system receives or transmits signals from or to a digital computer. 4. Space is limited, such as in portable equipment. 5. Process downtime is costly and must be minimized. If the amount of logic to be implemented is large and it involves a batch or continuous process application, the implementation selection is easy: The application should be installed on a programmable logic controller (see Section 5.4). However, for instrumentation applications or process applications similar to or smaller than the applications reviewed above, the use of dedicated solid-state circuits is a reasonable option. Solid-State Logic Options There are three popular methods of implementing dedicated solid-state logic control circuits. In the first option, the circuit is constructed on a plastic card, called a printed circuit board (PCB). The conducting connections shown between pins on the device packages are etched on the PCB, with the input and output leads brought to the edge of the board. The logic packages are attached to the appropriate places on the board,

1022

PLCs and Other Logic Devices

and the entire circuit board is plugged into a protective chassis. Circuit repair usually encompasses replacement of the entire board. The second method of solid-state logic circuit implementation is the use of a plug-in module. This technique is popular because it closely mimics the construction philosophy in the relay logic circuits, which it is replacing. A rack is mounted near the application, and small, individual, often cubic solid-state packages are plugged into the rack. Wires are connected between cubes where necessary. This technique offers more versatility than the dedicated circuit board approach but also requires more space and is subject to more failures generated by human error during or after installation. The third way to implement dedicated pure logic control involves using a single board controller card that is driven by programmable logic device (PLD). These cards allow the user to program various combinations of logic operations into the PLD. In operation, the inputs to this board generate output responses that are functions of the logic scenario currently resident in the PLD. These cards may or may not come with the appropriate industrial signal input/output interface. However, such interfaces are available and the entire setup, i.e., the PLD card and the interface cards, provides a compact stand-alone pure logic control.

© 2006 by Béla Lipták

Bibliography Almaini, A. E. A., Electronic Logic Systems, Englewood Cliffs, NJ: Prentice Hall, 1986. Amos, S. W., Dictionary of Electronics, 2nd edition, London: Butterworths, 1987. Bishop, T., “The Logic of SSRs,” Instruments and Control Systems, December 1977. Carr, J. J., Elements of Electronic Instrumentation and Measurement, Englewood Cliffs, NJ: Prentice Hall, 1986. Gilbert, R. A. and Llewellyn, J. A., Principles and Applications of Digital Devices, Research Triangle Park, NC: Instrument Society of America, 1982. Patrick, D. R. and Fardo, S. W., Electrical Motor Control Systems: Electronic and Digital Controls Fundamentals and Applications, Goodheart-Willcox, 2000. Paynter, R. T., Introductory Electronic Devices and Circuits: Conventional Flow Version, 6th edition, Englewood Cliffs, NJ: Prentice Hall, 2002. Porat, D. L. and Arpad, B., Introduction to Digital Techniques, 2nd edition, New York: John Wiley & Sons, 1987. Reilley, C. M., Transistor Engineering and Introduction to Integrated Semiconductor Circuits, New York: McGraw-Hill, 1961. Roth, C. H., Fundamentals of Logic Design, Brooks Cole, 2003. Smith, S. and Smith, K. C., KC’s Problems and Solutions for Microelectronic Circuits, 4th edition, Oxford: Oxford University Press, 1998. Strong, J. A., Basic Digital Electronics, London: Chapman and Hall, 1991. Tocci, R.J. and Widmer, N. S., Digital Systems: Principles and Applications, 8th edition, Englewood Cliffs, NJ: Prentice Hall, 2000.