FPGAs in Education Michel Crastes [email protected]

When we invented FPGAs .. • Xilinx did not initially realize that we were creating an educational platform for the digital engineering and computer science curricula

• Or the impact that FPGAs would have in research across a plethora of engineering and scientific disciplines

• But it did not take long: XUP was born in 1985! 34ème Colloque Pédagogique National – Marseille 2007 2

More than two decades later .. • The low-volume, “glue logic”, prototyping FPGA has been transformed – FPGA densities and speeds exceed the requirements of almost all ASIC design starts – Customers are ordering more than 1 million parts per month for single designs – FPGA hard blocks cannot be readily designed out with ASICs – For many designs, the FPGA is the system 34ème Colloque Pédagogique National – Marseille 2007 3

When the FPGA is the system ECC and Interconnect

18 Kbit FIFO Logic 18 Kbit

36Kbit Dual-Port Block RAM / FIFO with ECC Higher On Chip RAM Bandwidth

FPGA Industry’s First Built-in PCIe & Ethernet Blocks ExpressFabric™ Protocol Support Real 6-input LUT, Up to 330,000 Logic Cells 30% Higher Performance

Virtex-5

3.2 Gbps Serial Transceivers Lowest Power

Virtex-4

ExpressFabric™ New Interconnect Architecture Enhanced Routing µp

25x18 DSP Slice Higher Precision

2nd Generation Sparse Chevron Superior Signal Integrity

DCM DCM PLL

Second Generation Triple-oxide, Advanced 65nm Process, 1 Volt Core, Strained Silicon Low Power

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550 MHz Clock Management DCM (precision synthesis) + PLL (Low jitter)

ASIC

SRAM

ASSP

FLASH

3.3V SelectIO with ChipSync 1.25 Gbps LVDS, 800 Mbps Single-Ended

Spartan-3: The FPGA for Low Cost Systems

18x18 Multipliers for low-cost DSP applications

I/O Banks 24 I/O Standards including RSDS, LVDS

Configurable 18K Block RAMs + Distributed RAM

Digital Clock Managers for sophisticated clock control

Guaranteed Density Migration MicroBlaze Soft Processor for Embedded and Control Applications 34ème Colloque Pédagogique National – Marseille 2007 5

Logic, DSP and Processor DSP

Logic

System Generator

ISE Foundation

System Design

IP

Processor Simulation Simulation

Platform Studio

Timing Analysis Utilization Power Analysis

HW in the Loop

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ChipScope Pro

XUP: Xilinx University Program • World-wide program to encourage and help the Academic Communities to use Xilinx technologies • Easy access to Xilinx best-in-class development tools and hardware platforms • Provides Professors with training, high-quality support and curriculum development assistance • Allows engineering students to receive hands-on experience with Xilinx’s industry-leading commercial tools • Web site: www.xilinx.com/univ 34ème Colloque Pédagogique National – Marseille 2007 7

CNFM-XILINX Partnership Agreement • Availability of Xilinx design resources to the Academic community

– Xilinx EDA Tool suite – Xilinx Hardware Platforms to support teaching & research activities through donations or at discount prices

• Support for a « Train-the trainers » program

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Development systems for education Virtex-II Pro 299$

Spartan-3E 149$

NEXYS (Spartan-3) 99$ BASYS Spartan-3E 59$

For advanced courses: DSP, Embedded projects & research

For Linux/networked processor courses

For logic/processor courses

For introductory logic courses

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Virtex Hardware Dvpt Material XUP2VP Board •

•

A unified platform for teaching and research in disciplines such as – – – –

digital design, embedded systems, digital signal processing computer architecture, operating systems, networking image & video processing, digital communications and much more …

Main features

– Virtex-II Pro XC2VP30

–

• • • • •

30,816 Logic Cells 2 PowerPC 405 processors 2,448 Kbits of Block RAM 136 18x18-bit multipliers 8 multi gigabit transceivers (4 available on board)

On board Memory • • •

Optional Double Data Rate SDRAM Removable Compact Flash Card ..

• • • •

10/100 Ethernet MAC/PHY 2 Stereo AC-97 audio CODECs Integrated VGA output RS232 & PS/2 ports

– Peripherals

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The Integrated Software Environment Advanced Design Techniques GNU Embedded Tools ¾Wind River Xilinx Edition ¾Embedded Development Kit ¾IMPACT ¾System ACE Configuration Manager ¾

Design Entry HDL Edit and Entry ¾System Generator for DSP ¾CORE IP Generator ¾Architecture Wizards ¾ECS Schematic Editor ¾RTL Checker ¾

Verification Technologies ModelSim Xilinx Edition ¾Static Timing Analyzer ¾ChipScope Pro ¾XPower power estimation ¾Formal Verification support ¾3rd Party HDL simulation ¾ChipViewer ¾FPGA Editor with Probe ¾HDL Bencher testbench generator

Synthesis Synplicity Synplify and Synplify Pro ¾Synplicity Amplify physical synthesis ¾MentorGraphics LeonardoSpectrum ¾Mentor Graphics Precision RTL physical synthesis ¾Xilinx Synthesis Technology (XST) ¾

Implementation

¾

Floorplanner and PACE ¾Constraints Editor ¾Timing Driven Place & Route ¾Modular Design ¾Incremental Design ¾Timing Improvement Wizard ¾

Board Level Integration IBIS Models ¾STAMP Models ¾LMG Smart Models ¾HSPICE Models ¾

3rd party partner tools

One solution for all devices & all your logic design needs 34ème Colloque Pédagogique National – Marseille 2007 11

Plate-forme technologique « Objets communicants et applications communicantes embarquées » V2P MINATEC - Grenoble

Club Robotique Spartan3 ENSIMAG - Grenoble

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Conclusion - FPGA interest proliferates FEC Coding

On chip networks

Encryption

Hardware compilation CAD tools Programmable hardware architectures

Digital Logic

Networking Dynamically reconfigurable systems

Embedded systems

Image & Video Processing

Computer Architecture Digital Signal Processing

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Configurable Computing

High Performance Computing

Hardwaresoftware co-design

Systems on chip

Speech Recognition Robotics