PP39
MAINTENANCE MANUAL
Stag Microsystems Ltd Welwyn Garden City
Stag Microsystems, lnc 1600 Wyatt Drive Santa Clara, CA 95054
Herts A L7 1JT
USA
Martinfield
United Kingdom Tel: (0707) 332148
Tel: (408) 988-1118 Fax: (408) 988-1232
Fax: (0707) 371503
803 1083 Rev.2
C A R D
R E P L Y
In keeping with our Company policy of continuous enhancement this m anual will be under constant review and will be updated when required. In order that th e updated vers ions are ad dessed correctly could the folloiwng manual registration form be completed and returned for the attention of the Service Mana ger, Sta g Electronic Designs Ltd.
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Ser i al n liTlbe r............................................................
.
--------------------------------------------------------------------------------
ERROR DETECTION This maint enance man ual is s uppl i ed a s an e nhanc em ent to Sta gs co- ordinat ed i n tern ati on a l team effort.
Therefore, should any err ors be d et ect ed, w e would be gr at ef ul if you would contact us as soon as possible as to th e natur e of th e mi st ake . Li kewi se if you would like to see i mprovem ents by adding y our own i d ea s or m odi fi cat i ons, then pl e a s e do not hesitate t o cont act us at our Head Office in Welwyn Garden City.
PP39 Mai nte na nce Ma nual Using this manual
Th is man ual consists of eight sect i ons ; e ach sect ion covers a spec i fic req ui rement that a Serv i c e Engi neer may, at s ome ti me, need t o know . Th is ma nual a s sumes th at th e Servi ce Engi neer i s famil iar with th e ope r at ing proced ur e s of th e PP39 MOS Programm er, as detailed i n th e Operati ng Instruction Manual . Thi s manual i s, wh er ever possi bl e, laid out i n easy t o follow pr oc ed ur es . The perf ormance ch ec k section pr ovides a mea n s of provi ng th e correct f unct i onal ity of a un it pr ior t o de s patch t o a customer . Th e ca l i bration pr oced ur e sect ion ena bl es a 'know n good u nit' to b e cal i brat ed . Th e ma int enance procedur e sect i on c o nsists of a series of t ests ena bl i ng f a ult isol ation with in a fail ed u n it . Test Equi pment Required 1. 2. 3. 4. 5.
Oscil l oscope eg Tektroni c 2445 Digit al Multi-meter eg D at a Pr ec i s ion 2480R 3 9M1 00 Mod ul e 3 9M200 Mod ul e Means of t esti ng RS23 2C eg Another P P3 9 .
0-1
CONTENTS Secti o n 1. 0
1 .1 1 .2 1 .3 1 .4 1 .5 1 .6 1 .7 1.8 1.9 1 .10 1 . 11 1 .12 1 .13 1. 1 4 1 .15 1 .16
Sec ti o n 2. 0
2.1 2 .2 2 .3 2.4 2.5 2 .6 2.7 2 .8 2.9 2.1 0
Secti o n 3. 0
3 .1 3.2 Section 4. 0 4. 1 4 .2 4 .3 4. 4 4.5 4 .6 4.7 4.8 4.9 4 .10 4.1 1 4. 1 2 4. 1 3 4. 14 4 .1 5 4 . 16
Technical Description
Bl ock Di ag ram Processor Cl ock G ene r a t or Decodi ng DRA M Memory EEPROM Di spl ay RS232 Int e rf a c e Di spl ay/ Key boa rd Control LED/Anal og ue Control Add ress/Da t a Pi n Drives Clamp s Vcc, VP24, VP1 and Ccmp onen t s Pull Up Tr an si s t or Pull Dow n Transi s t ors Powe r Up Performance Check
Check Chec k Check Ch ec k Ch ec k Check Ch eck Ch eck Ch eck Ch eck
Sof tw a r e Cali bration Key bo a rd LED' s Di spl ay EEPROM DRAM RS23 2C Ope r a ti on of Z IF Sock e t s Ch eck Prog rammi ng C apability
Calibratio n Procedure
Cur r ent Source Cali b r ati o n Volt ag e Clamp Cali bra tion Mainte na nce Procedure
Test Mode Te st Di sp l ay Checksurn System PROM Display EEPROM TYpe Test DAC' s T est OV Clamp s Test Cu r rent G en r ators Te st Ad dress Lin e s DRAM Test Tes t Dat a Li nes Tes t RS2 3 2C Tes t EEPROM Boot EEPROM Checksum Mod ule EPROM
Calibrate Access Time Cali bra tion
0·2-
Section 5.0
5.1 5 .2 5 .2 . 1 5 .2 .2 5 .3 5 .3 . 1 5 .3 .2 5 .3 . 3 5 .3 . 4 5 .3 .5 5 . 3 .6 5 .3 . 7 5 .3 . 8 Section 6.0
6.1 6 .2 Section 1.0
7 .1 7 .2 7 .3
Parts List
Ord e ring Informati o n Componen t Li s t s Mai n boa rd Powe r Supp l y ! tan s Li st s P P 39 As sanbly P P 3 9 Cov e r Mo ul di ng A s sy P P 39 Mai nboa rd P P 3 9 Bas e As sy P P3 9 Heat si nk ( 8 TRS ) P P 3 9 Heatsi nk ( 3 TRS ) P P 3 9 C abl eform As sy P P 39 PSU Boa rd
1 00-002 1 1 00-003 1
Mai nbo a rd PSU Boar d Circuit Diagrams
Module
8.1 8.1 1 8 . 1 .2 8 . 1 .3 8 .2 •
1 00-0000 1 00-0003 1 00-002 1 1 00-0002 1 00-0 0 1 5 1 00-00 1 6 1 00-00 1 4 1 00-003 1
Compo nent Location
P P 3 9 Mai nboa rd P P 39 PSU Boa rd P P 3 9 Mai n b o a r d (281 6)
Section 8.0
1 00-002 1 1 00-0031
3 9M 1 00 Componen t Li s t !tan s Li st Ci rcuit Di ag r am 39M200
0-3
1 00-002 1 1 00-003 1 1 00-002 1
1 .0
Technical Description
Thi s section shoul d be re ad with refe rence t o the ill ust r ati ons a nd ci rc uit di agrams in thi s ma n ual . It des c ri bes the o peration of the P P 3 9 MOS P rogr amme r .
1 .1
Block Diagram
PP39 Main Board
Thi s board p r ovid es the fol l owing functi ona l circ uit bl ocks which a re s u bseq ue ntly r eferred t o by th ei r block names: Block N ame
Func tio n
P r oc esso r
Z80
All clock a nd timing p uls es
Cl oc k Genera t o r
Loc al DRA M s to r ag e
DRAM
EPROM a nd s c r a t ch-pad memory
Memory
E EPROM mem ory
EEPROM
Decoding for thi s board, mod ul e, a nd RA M ex t ension, pl us DRA M r ef reshing
Dec odi ng / DRA M r ef r e sh
RS232 In t e rf a c e
RS232 In t e r fa c e
Alph anum e ri c di spl ay and d riv ing el ec t ronic s
Di spl ay
Pe ri phe ral i n t erfa c e for d evic e d a t a pi n d riv e r s a nd di spl a y/key b o a rd con t r ol .
Decodi ng/DRA M c o nt r ol
Pe ri phe ral i n t erfa c e f or LEDs and a nal og ue ele c t ro ni c s con t rol
LEDs /A nalog ue c o n t r ol
Pe r iphe r al i n t erf a c e s for d evi c e add ress/d a t a pi ns
Addr es s/d a t a pi n d riv e r s
5 t o 28 V prog ramma bl e v ol t ag e clamp s
Cl amp Vc c Cl amp VP24 Clamp V P1
Voltage cl amp ov erc urre n t d e t ec t or
Canpa ra t or
High vol t ag e c ur r en t s uppli es
P ull up t r an si s t ors
5V p ull up s a nd OV cl ampi ng
P ull dow n t r an si s t ors
Power Up rese t
1-1
1 .2
Processor
The Z80 i s an 8 b it pr oces s or wh ich can address 64K bytes of mem ory d i re ctly . It is dr iven by a 2 M Hz clock and may r un softw a re res ident on the same board or in the module . I n pu t
E /I RQ / NMI /RES
all process or ti ming I/0 t ra n s fe r inter rupt hardware fa ult interrupt reset process or
cloc k ge ne rator RS232 i nt e r fac e compa r a tor pawer-up / RD /WR /MRW /RFSH A- b u s D- bus
1 .3
Purpose
Output
From
pr ocessor re ading d at a process or wr it ing dat a ind i cate s val id addre s s on address b us next /M RW for refresh addres s li nes bi-directi onal data
Clock Generator
The c ryst al oscil lat or provides a 16MHz sq uar e wav e whi ch i s div i ded immedi a tely t o 4MHz and used for clocking of th e J-K flip- flop s . Sub sidia ry outp ut s p rovid e all sys tem timing incl ud ing DRAM a c cess and re fr eshing .
In pu t
PHI MRW
DAM
Output
From
all ti mi ng from thi s DRAM a c cess and re fresh DRAM de code
1 6MHz Xt al Decod ing De coding E Q CMUX /RAS / CA Q2
1 .4
Purpose
2 MHz sys t em clock quadr at u re of E DRAM addre s s mult i plex DRAM row sele ct DRAM column sele ct UART clock
Decoding Any de v ic e on the Z80 dat a bu s ( mem ory chip, DRAM, PIA LSI de v ic e etc) re ceive s a sele ct s ign al when the Z80 w ishe s t o acce s s it for a dat a t r ansfer . These sele ct signal s are obtained by comp a ring the state o f the a ddre s s bus wi th the pattern all oc a te d for e ach dev ice .
In a dditi on cert a in m i scall ane ou s l og i c fun ct i ons are als o pe rformed . Al l these f unct i ons are made by the use of a combin at i on of TTL de code rs and FPLA' s . Refer t o ap pendix 1 fo r in st r u ct ion on reading FPLA t ables . I n put
F rom
Output
1-2
Pur pose
1 5 .
D RAM
Th e on- board DRAM co nsists o f 6�K bytes fo r holding PROM dat a . Th i s i s con structed from eight 6�K x 1 DRAM s banked i nto bloc ks o f 1 6K byte s . I n put
1 .6
Purpose
Output
From
A-b u s
Z80
D-bu s RBD RB 1 / RAS /CAS / IM E
Addre s s D at a Drive r Address Dat a Drive r Cl oc k Gene rat or D ecod i ng De cod ing
Z80
addres s D RAM wi th in s elec ted ba nk bi -di recti onal dat a selec t DRAM bank selec t DRAM bank DRAM array row sel ect DRAM a rray column sel ect D RAM a r r ay w rit e ena ble
Memory
Th e ma inf ram e EPROM co nt ai n s the pow er u p i nit i ali s in g softwa r e, keyboa rd, displ ay and te st softw a re. Th e scratchpad RAM provi de s 2K bytes o f worki ng RAM for t em po r a ry st or age .
1 .7
In put
From
/ RD IWR / SPAD / PROM D-b us A-bus
Z80 zoo Decod i ng De coding Z80
Output
Purpose
processor rea d ing pr ocessor writ ing sel ect s cr atch- pa d RAM select mainframe EPROM bi-di rectio nal dat a a dd ress l i n es
zoo
EEP R OH
Th e EEPROM i s used to sav e m achi ne p a ramete rs, built up usi ng cert a in 'SET' function s, a ft e r th e power h as bee n r emoved . The in it i al isati on softw a r e co pies the EEPROM i nto th e s c r atch- pa d RAM at p ower u p . On e a rl ier boa rds th e EEPROM w as a 2 817 requi r ing a d dit i onal elect roni cs fo r it s op eration . On l at e r boa rds a 2 81 6A typ e EEP R O M was f i t ted wh ich n eeds n o a d d i t i o nal ele ctron i cs . Input
Ou t put
From
Purpose
For b oth EEP ROMs D-b u s A-bus / DR /W R lEE
Z80 zao zao Z80 D eco ding
bi-di re cti onal data add ress li nes proce sso r re adi ng proce sso r w r i t in g s el ec t EEPROM
Addit i o nally for 2 817
Rffi 3
RIBU
EPRM
/-3
i n d i c a te s s uccessf ul w r ite 2 1 V req ui red to write to EEPROM t u rn s on 2 1 V to EEPROM
1. 8
D is play
This co nsi sts of a 1 6 ch ar acte r alph a num e r ic v a c uum fl our esce nt di spl ay dri ven by a mul tipl exi ng di splay con trol l e r . Con trol a n d data w ords a re w ri t ten t o th e controller ser i ally . The neg a ti ve vol tage s req u i red t o dr ive the d is pl ay are de r ive d fr om a de to de conve rter (IC3). Output
Input
From
RSD DAD
Di sp l ay/keyb o a rd c o ntrol Di s pl ay/key bo a rd co ntrol Di spl ay/keyb oa rd co nt rol
CLO
Purpose
reset dis pl ay cont r ol l e r seri al dat a inp ut cl ock s seri al dat a
Di spl ay PSU ( I C 3) Pin 3 Pin 4 Pin 6
1 9 •
app r ox - 25V de app rox 2V rms -20V de app r ox 2V rms -20V de
RS232 Interface
This uses a n LSI univer sal a synch ronou s receiver/tr ansm itter (UART) to conv e rt pa r allel 8- bit dat a to seri al form . Th e UART i s buffe red and connec t ed t o the 25-way fem ale connect or. Input
02 A1 , AO D-b us RIW /URT
/ RES
O u tp u t
From
cl ock ge ne r a tor
zao z8o
decod i ng decod i ng power up / I RQ
/ RXD
CTS
DSR DCD
25 25 25 25
way way w ay way
con n conn conn conn
P u rpo se UART reg ist er sele c tio n bi-di re ctio n al data da ta d irecti on control int e rn al t im ing of UART UART select sign al UART re set I/0 interru pt to zao
pin 3 pin 5 p in 6 pin 8 TXD RTS DTR
p in 2 pin 4 p i n 20
Display/Keyboard Control
1 .10
Th e di spl ay i s co n t rolled by send ing se r i al d at a t o the di spl ay co n trolle r ove r ' DAD' synch ron ised by a clock i ng s ig n al o n ' CLD' . Th e keybo a rd con si s t s o f a m atr ix of columns and rows whe r e p r ess i ng a key w ill m ake a connect ion between a part ic ul a r row a n d colum n l i n e . The P I A o u tp ut s a pa tte rn t o the col umn s a n d reads back the stat u s of the row s . From th i s, the proces sor c a n calc ul a t e th e key p re s sed . P ROTA o f th e PIA co nnect s onto th e RD-b u s as de scr ibed i n th e Ad dr ess/Da t a Pi n Drive r sect ion . Th e i np ut s t o a nd o u tp ut s from th i s block are de f i ne d i n th e f ollowi ng tabl e: Input
From
AO, A1
Z80 zao
D-b us PO RT4 R ES Pi n s 1 4- 1 7
decodi ng powe r- up CONN K
Pur p os e
Outpu t
Pi n 1 3 Pin 1 8-2 5 DAD CLD RSD RD-b us
PIA reg i s te r selec tio n b i-d i rect io n al d a ta selec t PIA re s et PIA reg i ste rs to keybo a rd row li nes to key bo a rd colum n l ine t o keybo a rd colum n l ine s ser i al dat a to d i spl ay con t roll er clock ing d a t a on DAD di splay con t rolle r re se t bi-d irec t ion d a t a t o dev ic e data p in s
LED/Analogue Control
1.11
Thi s PIA i s m a i nly u sed for control of the analog ue driv ing el ectronics ie p ull up t r a n s i s to r s, clamp s and pull dow n trans i s tors . Add i t ional func t ion s a r e incl uded i n the t able below: Input
From
AO, A1
Z80 Z80
D-bus PORT1 RES
R/00
decodi ng pow er up EEPROM
CTS
RS23 2 in terface
Output
Purpose
P IA regi s ter selec t i on b i- d i r ec tional d at a sel ec t PIA re set PIA r eg ist e rs i ndi c a tes suc cessf ul EEPR OM w ri te * RS23 2 handsh ake s i gnal I..2 8 L2 4 R24 R28
EP RM CON EIXi DX 1 - DX4
mod ul e LED' s mod ule LED' s mod ul e LED' s mod ul e LED' s co nt rol s EEPROM h i volt age * turn s o n cl a mp s Vc c, V P 1 and VP24 acce s s t i me co ntrol co n trols pull dow n transi stors a,
Y 1 -Y7
*
b,
c
and d
co nt rols all pull up trans ist ors
sig n al only appl i es t o boa rd s f i tte d w i th 2 81 7 EEPROM.
1-5
1.12
Address/Data Pin Dri vers
Th es e tw o PIA' s a re used mainly fo r d riving d evice add r ess pins and d rivi ng / sen sing d evice d a ta pin s . Addi tional fun c tions a r e incl uded i n th e tabl e b elow: In put
From
AO, A1 D-bus PORT2 PORT3 RES
zao Z80
O utp u t
Purpose
PIA regi s te r sel ec t i on bi-di r ec tion al d a t a selec t PIA sele c t P IA rese t PIA reg i s ters
d ecoding d ecoding pow er- up PA-b us QA9, 1 1 , 1 3 LD-bus RD-bus RB -bus WAGL WAGR BLP
1.13
drive d evi ce add ress pi n s control s pull down tran si s tors e, f and g bi-d i rec ti onal d a ta to dev ice d a ta pi ns bi-di rec t i onal d a ta to dev ice data p in s selec t DRAM ban k con trol 1 0K p ull up s on LO-bus con trol 1 0K pull ups on RD-bus con trol bl ee per
Clamps Vcc, VP24, VP1 and com parator
As all th ree DAC's a r e practi cally ide n tic al only one ne ed s to be des c ri b e d, clamp Vcc . Th e DA C l a tch es on 8-bi t v al ue w ri t ten to i t by th e processor and p roduces a nega ti v e vol tag e p ro po rtion al to i t at pi n 1 6 of th e DAC . An e r ro r v ol tage a t pin 5 of th e o p amp i s am pl i fi ed and used to con trol th e c ur r en t sin k TR9 . Thi s con trol s wh e th e r c ur r en t i s flowi ng i n to C3 0 from TR 1 1 o r out of C30 i n to T R 9 and h ence th e v ol tage a c ross C30 . Th e cl amp tran si s to r TR1 3 p rov i des current ga i n an d s e ts th e cl am p o u t put vol tag e . Th e v ol tage a t th e colle ct or o f TR 1 3 is de termin ed by R2 4 an d is used by th e com pa r a tor to de te c t an over c urren t fa ul t which th en genera tes an/ NMI . Th e inp uts to and outputs from thi s block a re defin ed i n th e f ollowi ng t a bl e: Input
From
D-b us IWR /DAC 1 /DAC2 /DAC3
Z80 ZBO
O u t pu t
Pur pose
bi-di rec ti onal d a ta processor w ri t ing selec t DAC 1 sel ect DAC2 sel ec t DAC3
deco ding d ecod i ng decodi ng VCC V P2 4
VP1 / NMI
cl amps coll ector of p ull tran s i s tor s clam ps coll ector of p ull t r ansis tors clamps c ol l e c t or of pull t r ansi s t ors i nd i ca t e t o Z80 h a rdw a r e
up up up faul t
1.14
Pull Up Transistors
Th e func t i o n of th ese i s t o take a d e v ice p in to a h igh vol tage . Pull up tra n s i s tors associa ted wi th outp uts b and g a r e connected to th e +1 5V rail as opposed to +3 2 V used on outputs a, c, d, e a nd f. Th e i np uts t o and output s from thi s bl oc k a re defi ned i n th e foll ow i ng table:
1.15
Purpose
O ut p u t
Input
From
Y 1 -Y7
LED/ anal ogue co n trol
con trol of pull up tran s i st ors a to g
high v ol tage p in d r ivers
Pull Down Transistors
These enabl e out put s a to g to b e clamped to O V. di rectly to th e modul e .
These outputs go
Th e i np ut s t o and output s from thi s bloc k a r e d ef ined i n th e following table: Output
From
DX1-DX3
LED/anal ogue con trol
co n trol of pull dow n tra n s istors
QA9, 11, 13
Addres s/da ta pi n d r iv e r s
co n trol of pull dow n tran s i s tors a to g
1 .16
Pur pose
Input
high vol tag e pi n driv ers
Power U p
Applicati on of mai ns powe r produ ces a l ong pul se on the / RES and R ES l i ne s wh i ch i ni tiali ses the Z80, UART and por ts . Th e i np ut s to and outputs from thi s bloc k a re d ef i ned i n th e followi ng tabl e: Input
From
Out put
appl i ca ti o n of pow er
Purpose
ch a rges C22 th rough R1 0 R ES / RES
hi gh power-on p uls e low pow er- o n pulse
I 12V Supply
Provides a regulated I 1 2V supply f or the RS232 interface and certain of the pull up transi s tors .
1-7
2.0
Performance Check
This se c tio n of the man ual des cribe s a me thod of chec ki ng th a t a PP39 MOS Programme r i s func ti o ni ng cor re c tl y . Th e se te s ts shoul d be ca r ri ed out p rior to d e s pa tch to a c us tome r . Howev e r, these p roced ure s sho ul d o nl y be used as a fi nal te s t and, sho ul d a ny tes t fai l, pl ease refe r to se c tio n 4 - Mai ntenance Proce dures .
2. 1
Check Software
2.1 . 1
Check Software Revision
Remov e any mod ul e for PP39 P�ER ON
Di s play wil l read MODULE? Pr es s SET Key Press 6 key s Di splay will read P P39 Iss XX Whe r e xx is th e rev isio n of the main frame s oftware Ens ure tha t th i s i s th e a p pro pri a te revi sio n . P�ER OFF
Ins e r t mod ule and repe at proced ure above to ch ec k r ev i si on of modul e .
Di spl ay read "Module KxOO XX" Wh ere x i s th e module num b er Re pe a t for any o the r m od ules 2.1 .2
Check Software Checksums
Access Tes t Mod e Key sequence SET, HIDDEN KEY (Betwee n LOAD a nd EDIT) A, B, A D ispl ay should r ea d TEST ENTER Sel ect test 05 -
The checksum of the sy s tem e prom will b e displaye d - En sur e thi s agrees wi th the i s s ue. Press EXIT Di spl ay will read TEST ENTER Sel ect tes t 85 The ch ecksum of th e mod ul e eprom will be di spl ayed - Ensur e thi s agrees with the issue.
R ep ea t ed f or any o th e r mod ul es
2.·1
2.2
Check Calibration
Th e na tu r e of th e ci rc ui try of th e PP3 9, requi res th e PP3 9 t o b e di smant l e d for Calibrati on Ch ecking; to d o thi s proceed a s f olla.�s:1 .
Dis connect unit from ma ins s upply .
2.
R em o v e from b a se of un i t th e th r e e sc r ews nearest th e front, which sec ur e th e bas e to th e c o v e r mould i ng .
3.
Remove f rom the r e ar pa nel th e tw o sc r ew s nea r est th e to p c orners .
4.
Ca refully sepa r at e the c ov e r mould i ng from th e base as sem bly . NO TE 1: The power su pply is mounted on the base and is connected to the mainboard via a cableloom assembly.
5.
Pl ac e th e un i t s uch tha t th e tw o halves a r e still el ect ric ally connec ted by th e c abl el oom a ssembly a nd ac c ess c a n be made of th e p c b' s .
6.
Recon nect to swi tchabl e mai ns s upply and i ns e r t 3 9M1 00 then sw i tch on .
7.
Th e f oll owi ng pr oc ed ure check s th e c o r r ec t c al i br a ti on of th e c urrent s ourc e of th e PP3 9 . P ress SET key P r es s HI DDEN key - betw een LOAD and E DI T keys Pr es s A k ey Pres s B key Pr ess A key - D i s pl ay w ill read TEST ENTER - Sel ec t t es t 86 Th e di s play w il l now be CALIB RATE Meas ur e the v ol ta g es ac ross R88 th en R84 and ch ec k f or 2.70V or - 0.1V
+
8.
Th e f ollow i ng proc edure ch ecks the c o r r ec t v ol tage c al ib r ati on of th e cl amps .
Chec k the vol tag es a nd ensur e th ey c o n form to th e tabl e below: Test Poi nt
D9 Anode ( TP 1 ) 0 1 5 Anod e (TP2) 0 1 6 Anod e ( TP3) Note 1:
Measu r e d V o l t a ge
1 2 .5 V 1 2 .5V 6 . 00V
Tolerance
+ or - 0 . 0 1 V + or - 0 . 0 1 V +or - 0 . 01V
Us e negative e nd of ca pacitor C22 for OV reference of voltmeter.
2.-2
2 .3
Check Keyboard
Ranove Mod ul e PCMER ON Displ ay wil l read MODULE? P r es s e ach key i n turn a nd ensure th e ho rn will sound a t each key p r ess This p roves th e c o n tac t s of all th e k ey s o f th e mem brane p a nel. Howev e r, to p rove th e PP39 ca n i nt e r pr et th e c orrec t keys, i t i s ad vi sa ble t o powe r off, insert a module, power on, and check th e u nit re sponds correctly as each k ey i s pr essed . ( Re fer to Op e r a ti ng I n st r uc ti on Ma n ual ) . 2 .4
Check LED's
Th e p roc ed u r e below d e sc ri b es th e method of ch ec k i ng c o r r ec t LED control fo r the 3 9M1 00. A s imila r t ec h n iq ue sho uld be used for any o th e r av a il a bl e mod ul e. PP39/39H100 LED's
In stall 3 9M 1 00 Power On
Pres s SET key Pr es s 0 k ey Pr es s DOWN AR ROW key ONCE Press EXIT key Pres s SET k ey Press 3 key Pres s DOWN ARROW key or UP A RROW k ey Displ ay show s MODE 8 BIT Press EXIT k ey The d i spl ay sh ould r ead AMD 2716 M8 a nd th e Two LEDs in r el a ti on t o th e 24 pin devic e o n each soc ke t, sho uld illumi na te o nly. P r es s P r es s P r ess Pres s
SET key 0 key RIGHT ARROW key SIX TIMES EXIT k ey
The di spl ay should now need AHD 27128 M8 and th e Two LEDs i n r el a ti on to th e 28 pin d evic e, o n each sock e t, sho uld illumina te only.
Pr ess Pr es s Press Pr ess
SET k ey
0 k ey
LEFT ARROW k ey THREE TIMES EXIT key
Th e ho rn sh ould sound and th e d i spl ay w ill read RAM EXCEEDED, th en the LED for right socket will EXTINGUISH only and the dis play will read AHD 27512 M8.
Z-3
2 .5
Check Dis play Access test mode (keysequence is SET, HIDDEN KEY (between LOAD a nd EDIT), A, B, A) Display will read TEST ENTER - Select test 00 Display should read •••••••••••••••• P r ess EXIT Select test 01 Display should read 0000000000000000 Press EXIT Select test 02 Display should scroll a * from right to left Press EXIT Select test 03 Display should scroll a 0 from right to left Press EXIT
2 .6
Check EEPROM Access test mode (key sequence SET, HIDDEN KEY (between LOAD and EDIT), A, B, A) Display will read TEST ENTER - Select test OD Display will read EET ( EEPR OM Test) After approximately 25 seconds display Display will read PASS Press EXIT Di splay will read TEST ENTER - Select test 84 (Module must be inserted) Display will read EEPROM BOOT then return to TEST ENTER - -
This is essential to execute this boot after an EEPROM TEST to re-configure valid EEPROM data.
2 .7
Check DRAM Access test mode Select test OB Display should read DRA and af ter a period of time PASS Press EXIT
2. 8
Check RS232C The UART can qui ckly be checked by a selftest.
LINK PIN 2 to PIN 3 of RS232C co nnector Access TEST MODE Select test OE Display should read IFA then PASS
2.-4
2.9
Check Operation of ZIF Sockets For this tes t two EPROMs are required1 x 2ij pin and 1 bo th with known checksums.
x
28 pin
Using a 2� pin programmed EPROM (with known C/ SUM, eg 2716) proceed as follows:Press SET 0 Using UP and DOWN cursor keys locate manufacturer of device Using LEFT and RIGHT cursor keys locate device type Insert device in to SKT 1 Press LOAD key Display should read XX.XX CSUH (where XXXX = c hecksum of device) Place same dev ice in SKT 2 Press LOAD key Display should read CSUH XXXX (where XXXX = crrecks urn of device) Press Cl SUH key Display should read XXXX CSU H XXXX and both checksums should be the same Remove 2� p in device and repeat for 28 pi n E P ROHs
2 .10
Check Programming Capability Using the 28 pin programmed EPROM (with known C/SUH, eg 27128) proceed as follows:Press SET 0 Using U P and DOWN cursor keys locate manufacturer of device Using LEFT and RIGHT cursor keys locate device type In sert master dev ice in to SK T 1 Press LOAD key Display will read XXXX CSUH Remove dev ice from socke t and place in SKT 2 Press LOAD key Display will read CSUH XXXX Remove master from socket 2 Press C/SUH key Display will read XXXX CSUH XXXX Insert two suitable empty devices in to the socke ts Press EHPTY key Display will read PASS EHPTY PASS Press PROGRAM key Display w ill read PA SS BIT TEST PASS Then change to PROGRAMMING XX where xx is a coun ter up to 40 in Hex (If 27128) Then change to PASS VERIFY PASS
2.-5
3 .0
Calibration Procedure
T o correctly calibrate the PP39 proceed as follows:Section 2.2 describes access to the c ali b r atio n p oi n ts and explains how to check c ali b r a ti on. With r eferen ce to this s ecti o n and th e tabl e below the c ali b r atio n c a n b e adjusted.
3 .1
Current Source Calibration Voltage Ac ross R88
=
2.7V + or - 0.01V Adj us t
RV1 on PSU
3.2
Voltage Clamp Calibration Test Point
0 9 Anode (TP 1 ) 015 Anode (TP2) 0 1 6 Anode (TP3)
Measured Voltage 1 2.5V 1 2 5V .
6.00V
+ or - 0 . 01V or - 0 . 01V + or - 0 . 01V +
Adjust
Tolerance
VR1 VR3 VR2
on Main Board
3-/
4 .0
Maintenance Procedure To aid the Service Engineer the PP39 has several test rou t ine s , which allow various parts of the circuitry to be more easily tested.
4. 1
Test Mode
To gain access to the tes t routines it is necessary to enter a coded seque nce of key presses. This is arranged like this to prevent a customer accidently ex ec u tin g a te s t w hen a device is fitted into a ZIF socket. The following instructions permit access to the test mode: Press Press Press Press Press
SET key HIDDEN key A ke y
B key A key
The display will now read ENTE R TEST
-
-
The tests available can b e split into two catagories:1.
2.
Mainframe test- test numbers 00 to 7F. Module execute tests- test num be r 80 toFF.
Note: Whilst in test mode the LIST RAM, EDIT RAM functions actually permit access to the 'REAL' address map of the PP39 ie. control latches etc can be written/read directly from the keyboard.
4.2
Test Display
There a re four display pa tterns , this tes t co ntinuously write to the display controller the screen pattern of instructions, thus if an incorrect display is present it is possible to fault find using an oscilloscope etc. Test Test Test Test
00 01 02 03
-
Displays a * in all 16 display positions Display a 0 in all 16 display positions Displays a single * and scrolls this from right to left Display a single 0 and scrolls this from right to left.
4-1
4 .3
Dis play EEPROK Type Test 04 EET
Th e P P 3 9 wa s origi nally desi gned t o em pty a 2 81 7 typ e of EEP ROM, how ev e r, th i s h a s now be en cha nged t o ty pe 2 81 6 . The l a te r d ev i ce can b e p rogrammed more q uickly, tha n th e origi onal. Ha rdw a re modif ica tions have bee n made to th e EEPROM ci rc ui t ry to s u it th e 2 81 7 EEPROM . Howev e r, t o i nd ependa nt defa ul t s t o EEPROM that algorithm .
sim pl ifY s oftw are iss ues ( i e only one EPROM of ty pe of EEPROM ) , th e programming of th e EPROM th e l onge r programmi ng cycl e, unl ess it r ead s from th e i t i s ty pe 2 81 6 a nd i n thi s c as e it runs th e fa st e r
T est 0 4 a t tem p ts t o w ri t e t o the EEPROM usi ng th e fas t e r algorithm and if succes sf ully s tored, th e di spl ay show s 2816 o therwis e it show s 2817. Af t e r this t es t has bee n exec uted th e fas te r al gor i thms w il l always b e used ( i f a p pl ic abl e ) . 4 .4
Checksum Syst em PROM Test 05 SYS CSUM
Th i s test ch ecksum s a nd dis pl ays th e sys tem EPROM .
4-2..
4 .5
Test DA C 's (Dig ital to Analogue Convertors) Test 06 Ramping DA Cs This test ramps all the DAC's in a continued loop. Set oscilloscope to 1ms/Div; 2 volts/Div check the waveforms, at pin 1 6 of IC's 4 2, 4 4 an 46, agree to that shown below:-
33�
Test 07 B it Walk DAC's Thi s test writes the pattern 01, 02, 0 4, 0 8, 1 0, 2 0, 40, 80 continuously to the DAC's. Set oscilloscope to 50mS/D iv, 2 volts/Div and compare the waveforms at pin 1 6 of IC's 4 2, 4 4 and 46 with that shown below:-
I
I I
Sv
4.6
Test OV Clamps Test 08 OV Clamp Walk
Thi s te st the seq ue nce s of the O V clamps, set th e osci l l oscope t o 50 m S/ Di v, 1 Volt /Di v a n d compa re the w av eforms, of pi n 14, IC33 ( DX1) ; i n 15 IC33 ( DX2 ) , and pin 16 IC33 (DX3), with th at sh ow n below: -
1-
Z.Sv
Also ch eck w av eform a t p i n 1 7 I C 3 3 (DX4) and c ompar e wi th that shown below : -
l.Sv
Pin's 1 2 of IC34 (QA13), 15 (QA9) a n d 17 (QA11) with th a t shown below: -
'•
'•
170,...5
4-4-
••
4 .7
Test Current Generators Test 09 Current G e n Walk
Set oscilloscop e t o 5 0mS/Div, 1 vol t/Div and c omp a re the w av ef orm b elow to th a t me a s ur e d on pi n s 1 0 ( Y 1 ) , 1 9 ( Y2 ) , 2 0 ( Y3), 2 1 (Y4), 22 ( Y5 ) , 23 ( Y6 ) and 2 4 (Y7) of I C33 .
3.8v
200pS
4 .8
Test Address Lines Test OA Bit Walk Address
Thi s t est w rit es a p a tt ern to b o th th e high add r es s and th e low address li nes a t th e sam e tim e; s e t oscillos cop e to 50mSec/Div, 1 Vol t/Div and compa re th e ass oci a ted meas urem e n t wi th those shown i n th e di ag r ams ov e rl e af:-
4-5
IC34 pins 1 0 ( pa 1 5 ) , 2 5 ( pa7 )
4v
IC34 pins 1 5 ( Qa 9 ) , 17 ( Qa11 ) -
-
IC34 pin 1 2 ( Qa 1 3 ) -
-
2..SV
zso,....s
4-&
IC34 pi ns 1 1 ( PA1 3 ) , 13 ( PA12), 1 4 ( PA 7 ) , 1 6 (PA8), 1 8 ( PAO ) , 19 ( PAl) , 20 ( PA2) , 2 1 (PA3), 22 (PA4), 23 (PA5) a nd 2 4 (PA6).
4v
4.9
D RAM Test Test OB D RA
Thi s t est ch ecks th e DRAM by wri ti ng a nd r eadi ng from th e DRAM . If a failure occurs the display will show the failed address the Also at this time the expected result and the actual result. micrprocessor i s con ti n uo usly loo pi ng at this RAM address.
Ex ampl e of f ail ur es: 004000
46
00
Addr es s
Exp e c t ed Res ul t
Ac tual Res ul t
If the RA M test i s succ e s sf ul th e di spl ay will r e ad PASS . A famili ar l oca tion can b e skipp ed by usi ng th e dow n c ursor k ey at the t est wil l co nti n ue to th e nex t f ail ur e (i f any ).
4.1 0
Test Data L ines Test Q C LD R
This s el f t es t w ri t es to and r ead s b ac k th e data pi n d ri vers . Again shoul d a f ail ur e occ ur th e displ ay wil l show b o th th e exp ec t ed and th e actual r esul t a nd th e pr oc essor l oops on this t est eg . 3A
>
0/ P Port
2A
02
I/ P Por t
Data Sent
06 Data Rec eiv ed
Pres s th e dow n c urs or key to skip through te s t
4--7
.
4.1 1
Test RS232C Test OE IFA
This t est requi res pi ns 2 and 3 of RS232C to pe rf orms a seri e s of t ests ch ec ki ng th e Uart Obviously, thi s t est i s n o t pr oof of corr ect this must b e ch ecked connected to a syst em . us ef ul for f a ult di ag nosi s .
b e limi t ed . It par amet er s . RS232C ope rati o n and How ev e r this t est is
A typic al f ail ur e res ult i s show n he r e . C C - 91 6 B
S-1 6
Wh ere C C i s 1 . C o n tr ol regi s ter 2, Comm a nd r egi s ter 9 1 i s d a ta of Con trol regis te r 6B i s da ta of Comm and r egi ster S-16 is S ta tus regis ter Th e f ol l ow ing tables show det ails of these regis te rs . No te: usi ng th e dow n cu rs or you c a n skip a failure i n the test and con ti n ue to the nex t f ailures (if a ny) .
4-8
CONTROL REGISTER
"Cc-91 6B S-16"
I 1 1
' l
D7 D6 D5 D4 D3 D2 D1 DO 80 40 20 0 8 4 1
I
0 1
STOP BITS 1 STOP BIT 2 STOP BITS 1 STOP BIT IF WORD LEr-x;1H 8 BITS &
= =
0 0
0
PARITY 1 1/2 STOP BITS IF WORD LENG1H = 5 B IT S & NO PARITY
I
0 0 0 0 1 1 1 1 1 1 1 1 1
WORD LENGTH
0 0 1 1
0 1 0 1
�
I
8
7 6 5
ECEIVER CLOCK SOURCE ... _... _
,...,._...
...
1 1
-
4-9
0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 0 1 1 1 1
BAUD RATE GENERATOR
16X EXTERNAL CLOCK 50 BAUD
75
109.92
1 3 4 .58 1 50
300 6 00 1200 1800 2400 �6 00 4800 7200 �00 19200
COMMAND REGISTER "cC-91
68 S-1611
1071 1: D51� D4 1 D3/ D 06 80 40 20 10
8
I
4
DO
D1
2
J
1
DATA TERMINAL READY
0
l
PARITY CHECK CONTROLS 0 PARITY DI SAB LED - NO PARITY BIT GENERATED NO PARITY BIT RECEIVED 0 0 1 ODD PARITY RECEIVER A N D TRANSMI TTER
1
-
0
1
1
0
1
1
1 EVEN PARITY RECEIVER
AND TRANSMITTER 1 H ARK PARITY BIT TRANSMITTED, PARITY CHECK DISABLED 1 SPACE PARITY BIT
=
=
DISABLE RECEIVER
AND ALL INTERUPTS (DTR High) ENABLE RECEIVER A N D A LL INTERU PTS (DTR Low)
RECEIVER INTERRUPT ENABLE IRQ INTERRUPT ENABLED FROM
0
=
1
=
BIT 3 OF STATUS RffiiSTEH IRQ INTERRUPT DISABLED
TRANSMITTER CONTROLS
TRANSMITTED,
PARITY CHECK DISABLED
'
NORHALIECHOHODE FOR RECEIVER
I 0 =I NORMAL
,
1
=I ECHO
(BITS 2 & 3 MUST 11011)
TRANSMIT INTERUPT
0 0 1 1
0 1 0 1
LEVEL
DISABLED
HIGH
ENABLE DI S AB LE D DIS AB L E D
LOt/
LOt/ LW
TRANSMITTER OFF ON ON TRANSMIT BRK
STATUS REGISTER
5-16n lD7J D6jD5J D4JD3J D2J D1 I DO I " Cc-91 6 B
STATUS ..__
0 1
PARI TY ERROR
FRAMIM:J ERROR
OV ER RU N
= =
0
=
1
=
0
=
1
=
R ECEIVE DATA R ffi ISTER FU L L
0
=
1
=
TRANSMIT DATA REG ISTER EMPTY
0
=
1
=
DCD
0
=
1
=
DS R
IRQ
4-11
CLEARED
SET BY
0
=
1
=
0
=
1
=
NO ERROR ERROR
SELF CLEA R ING
NO ERROR ER ROR
SELF CLEARIOO
NO ER ROR ER ROR
SEL F CLEARING
NOT FULL FU L L
REA D R ECEIV E DATA REG ISTER
NOT EMPT Y EMPTY
W RITE TRANSMIT DATA REDISTER
DCD DCD
=
LON H IGH
NOT RESETTABL E R EFLEC1S DCD STATE
D SR DS R
=
LON HIGH
NOT RES ETTABLE REFLECTS DS R STATE
=
=
NO INTERRU PT INTERRU PT
READ STATUS Rffii STER
4.12
Test EEPROH Test OD EET
This t est ch ecks th e EEPROM, how ev er shoul d a f ail ur e oc cur this t e st does not loop (t o pr eserv e EEPROM lif e time ) . A typi cal fail ur e woul d b e: 2 840
BC - FC
Whe n 2 840 i s the faili ng address BC is th e writ ten da ta FC is th e rea d da ta Th e down c urs or k ey conti nues the te st t o th e next failur e (if a ny ) . 4.13
Boot EEPROH Test 84
This t est 'boots' th e EEPROM with vali d paramet ers appli ca bl e t o th e modul e fitt ed . This t est must b e exec ut ed f or consist ant modul e op er ati o n . Otherwi se a s eri es of s tor e oper a tions must be made . 4 .1 4
Checksum Module EPROH Test 85
This t est ch ecksum s the modul e EPROM. 4.15
Calibrate Test 86
Pl eas e r ef er t o cali br at e pr ocedur e 4.16
Access Time Calibrate Test 87
Using a n os ci l l os cope s et t o 0 . 1 mSI Div, 1 Volt/Div . Adjust RV 1 on 39M100 module (only) whilst mo ni t ori ng modul e t est p oi nt 1 and ch eck time p e riod v a ries from appr ox 0.05mS t o 0.55mS.
4-IZ
5 .2
Com ponent Lists
5 .2 . 1 5 .2 . 2
Mainboar d PCB Powe r Supply
5-/
1 00-002 1 1 00-003 1
C O M PO N E N T L I S T c 14 c 15 c 16 c 17 c 18 c 1 9 c 20 c 21 c 22 c 23 c 24 c 25 c 27 c 28 c 29 c 30 c 31 c 32 c 33 c 34 c 35 c 36 c 37 c 38 c 39 c 41 X 1 M 1 M 2 M 5 M 6 M 7 M 8 M 9 M 17 M 24 M 25 M 26 M 27 M 28 M 29 M 30
1 00-002 1
1 23 1 00 1 23 1 00 1 23 1 00 1 23 1 00 1 2 3 1 00 1 23 1 00 1 23 1 00 1 23 1 00 1 1 0 043 1 23 1 00 1 2 0 1 04 1 23 1 00 1 23 1 00 1 23 1 00 1 2 3 47 4 1 23 474 1 23 1 00 1 23 1 00 1 2 3 47 4 1 23 1 00 1 23 1 00 1 23 1 00 1 23 1 00 1 23 1 00 1 24 56 2 1 2 4 1 02 308 003 1 00 0022 309 1 65 400 06 0 400 06 0 400 06 0 400 060 1 0 0- 0 0 1 4 3 1 8 7 64 400 060 400 06 0 400 06 0 400 0 6 0 400 060 400 060 400 060 -
5-2.
P P 3 9 P CB
IS S U E
6
C A P M U LT I L A Y ER C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L A Y ER C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AYER C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY ER C E R A M I C 0. 1 u F 5 0 V C A P M U L T I L AY E R C E R AM I C 0 . 1 u F 5 0 V C A P M U L TI L AY E R C E R A M I C 0. 1 u F 5 0 V C A P A L EL E C A X I AL 47 u F 1 0 V C A P M U L TI L A Y E R C E R A M I C 0 . 1 u F 5 0 V CA P R ES I N DI P P E D T A N T 1 . 5 u F 3 5 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V CA P M U LTI LAY E R C E R A M I C 0 . 47 u F 50 V C A P M U L T I L AY E R C E R A M I C 0 . 4 7 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0. 1 u F 5 0 V C A P M U L TI L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 4 7 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I LAY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 5 6 0 0p F 5 0 V C A P M U L T I L AY E R C E R A M I C 1 0 0 0p F 5 0 V C R Y S T A L 1 . 84 3 2 M H Z P P 3 9 P CB D I S P LAY F I P 1 6 A5 R S O L D E R P I N D/ S S O L D E R P I N D/ S S O L D E R P I N D/ S S O L D E R P I N D/ S P P 3 9 CAB L E FO R M A S S Y E P R O M 2 7 64 S O L D E R P I N D/ S S OL D E R P I N D/ S S O L D E R P I N D/ S S O L D E R P I N D/ S S O L D E R P I N D/ S S O L DE R P I N D/ S S O L D E R P I N D/ S
C O M PO N E N T L I S T 92 93 94 95 96 97 98 99 1 2 3 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1 2 3 4 5 6 7 8 9
R R R R R R R R D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D
D D
D D D c c c c c c
c c c
c 10 c 11 c 12 c 13
1 0 0 - 0 0 21
1 32 1 00 1 3 1 6 81 13 1 27 2 1 31 27 2 1 3 1 333 1 3 5 1 80 1 35 1 8 0 13 5 27 0 2 8 8 1 07 2 84 1 4 8 2 84 1 4 8 2 84 1 48 2 84 1 4 8 2 84 1 4 8 2 8 4 14 8 2 84 14 8 2 84 1 4 8 284 14 8 284 14 8 2 84 1 4 8 2 84 1 4 8 284 1 48 2 84 1 4 8 2 84 1 4 8 284 1 48 284 148 284 14 8 2 84 1 4 8 284 1 48 2 84 1 4 8 2 84 1 4 8 284 1 48 284 1 48 284 1 48 2 84 1 4 8 284 1 48 2 84 1 4 8 2 84 1 4 8 2 84 14 8 2 84 14 8 2 84 1 4 8 2 8 4 1 48 2 84 14 8 2 84 14 8 2 84 1 4 8 284 1 4 8 2 84 1 48 110 0 07 110 0 07 12 3 1 0 0 11 0 0 4 4 12 3 10 0 1 20 1 04 12 3 10 0 12 3 1 0 0 120 104
P P 39 P CB
IS S U E
6
R E S I S T O R C A R B O N F I L M 0.5W 5$ 10 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5$ 6 80 R R E S I S T O R C A R B O N F I L M 0.25W 5% 2 K7 R ES I S T O R CA R B O N FIL M 0.2 5W 5$ 2 K7 R E S I S T O R C A R B O N F I L M 0.25W 5$ 3 3 K R E S I S T O R TH I C K FIL M 0 . 5W 2 $ 1 8 R R ES I S T O R TH I C K F I L M 0 . 5 W 2 $ 1 8 R R ESI STO R TH I C K F I L M 0. 5W 2% 27 R DIO DE Z EN E R 1 .3W B Z X 6 1 C 1 5 V DIODE 1N4 1 4 8 DI O D E 1 N 414 8 D I O DE 1 N 4 1 4 8 DI ODE 1 N 4 1 4 8 DI O D E 1 N 4 1 4 8 DIODE 1 N4 1 4 8 DI OD E 1 N 4 1 4 8 DI O DE 1 N 4 1 4 8 DIO DE 1 N 41 4 8 D I ODE 1 N 4 1 4 8 DIO D E 1 N 41 4 8 DI ODE 1 N 41 4 8 D I O D E 1 N4 1 4 8 D I OD E 1 N 4 1 4 8 DI OD E 1 N 4 1 4 8 DI ODE 1 N 4 1 4 8 DI OD E 1 N 4 1 4 8 D I ODE 1 N 41 4 8 DI OD E 1 N 4 1 4 8 DI O D E 1 N4 1 4 8 DI O D E 1 N 4 1 4 8 DI O D E 1 N4 1 4 8 D I O D E 1 N4 1 4 8 DI O DE 1 N4 1 4 8 DIODE 1 N4 1 48 DI O D E 1N4 1 4 8 DI O DE 1 N4 1 4 8 DI ODE 1 N4 1 4 8 DIODE 1 N4 1 4 8 D I OD E 1 N 4 1 4 8 DI O D E 1 N414 8 DIODE 1 N4 1 4 8 DIODE 1N414 8 DIODE 1 N414 8 DI O D E 1N4 1 4 8 DI O D E 1 N 4 1 4 8 DI O D E 1 N414 8 D I ODE 1 N 41 4 8 C A P A L EL E C R A DI AL 1u F 6 3 V C A P A L EL E C RADI A L 1uF 6 3 V C A P M U L T I L AY E R C E R A M I C 0.1 u F 50V C A P A L E L EC AXI A L 1 0 0 u F 10V CA P M U L TI L AY E R C E R A M I C 0.1 u F 50V C A P R E S I N DI P P E D TA N T 1 . 5 uF 35V C A P MULTI L AY E R CE R A M I C 0 . 1 u F 50V C A P MU LTI L AY E R C E R A MIC 0 . 1 u F SOV C A P RESIN DIPPED TANT 1 .5uF 35V
123 011
CA P CERAMIC PLATE 470pF 63V
12 3 0 1 1 1 2 3 0 11 123 011
CAP CE RAMIC PLATE 470pF 63V CAP CE RAMIC PLATE 470pF 63V
5-3
C A P C E R A M I C P L A T E 4 7 0p F 6 3V
COM P O N E N T LIST 32 33 34 35 36 R 37 R 38 R 39 R 40 R 41 R 42 R 43 R 44 R 45 R 46 R 47 R 48 R 49 R 50 R 51 R 52 R 53 R 54 R 55 R 56 R 57 R 58 R 59 R 60 R 61 R 62 R 63 R 64 R 65 R 66 R 67 R 68 R 69 R 70 R 71 R 72 R 73 R 74 R 75 R 76 R 77 R 78 R 79 R 80 R 81 R 82 R 83 R 84 R 85 R 86 R 87 R 88 R 89 R 90 R 91 R R R R R
1 00-002 1
1 3 1 47 3 1 3 1 47 1 1 3 1 33 1 1 3 1 1 02 1 3 1 6 82 131 1 51 1 3 1 1 02 1 31 3 3 2 1 3 1 47 3 1 3 1 47 1 1 3 1 1 02 1 3 1 6 81 1 3 1 1 02 1 3 1 1 02 1 3 1 3 32 1 3 1 47 3 1 3 1 47 1 1 3 1 33 1 1 3 1 1 02 1 3 1 6 82 1 31 1 51 131 331 1 3 1 56 1 1 3 1 1 02 1 3 1 27 2 1 3 1 27 2 1 3 1 47 1 1 3 1 6 81 1 3 1 27 1 131 331 1 31 27 2 1 3 1 1 02 1 3 1 27 2 1 3 1 27 2 1 3 1 27 2 1 3 1 27 2 1 31 1 0 2 1 3 1 82 2 1 3 1 822 1 31 47 2 1 3 1 6 82 1 3 1 39 2 1 3 1 27 2 1 3 1 392 1 3 1 6 81 1 3 1 27 2 1 3 1 1 02 1 3 1 27 2 1 3 1 47 2 1 3 4 56 0 1 3 1 1 02 1 3 1 6 82 1 3 5 27 0 1 3 4 56 0 1 3 5 27 0 1 3 5 27 0 1 35 2 7 0 1 35 27 0 1 3 1 6 82 1 3 5 27 0
5 -4
P P 39 P CB
ISSU E
6
R E S I S TO R CA R B O N F I L M 0.2 5 W 5 % 47 K R E S I S T O R CA R B O N F I L M 0 .2 5W 5% 47 0 R R E S I S T O R CA R B O N F I L H 0.2 5W 5 % 3 3 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 1 K O R E S I S T O R CA R B O N F I L M 0.2 5W 5% 6 K 8 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 1 50 R R E S I S T O R C A R B O N F I L M 0.2 5W 5% 1 K O R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 3 K 3 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 47 K R E S I S T O R CA R B O N F I L M 0 .2 5W 5 % 47 O R R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 1 K O R E S I S T O R CA R B O N F I L M 0 .2 5W 5 % 6 8 0 R R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 1 K O R E S I S T O R CA R B O N F I L M 0.2 5W 5 % 1 K O R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 3 K 3 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 47 K R E S I S T O R CA R B O N F I L M 0 .2 5 W 5 % 47 0 R R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 330 R R E S I S T O R C A R B O N F I L M 0 .2 5W 5 % 1 K O R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 6 K 8 R E S I S T O R CA R B O N F I L M 0 . 2 5W 5% 1 50 R R E S I S T O R C A R B O N F I L M 0 .2 5W 5 % 33 0 R R E S I S T O R C A R B O N F I L M 0 .2 5W 5% 5 6 0 R R E S IS T O R C A R B O N F I L M 0 . 2 5W 5 % 1 K O R E S I S T O R CA R B O N F I L M 0.2 5W 5 % 2 K7 R E S I S T O R C A R B O N F I L M 0.2 5 W 5 % 2 K 7 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 4 7 0 R R E S I S T O R CA R B O N F I L M 0.2 5 W 5 % 6 80 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 27 0 R R E S I S T O R C A R B O N F I L M 0 .2 5W 5 % 3 3 0 R R E S I S T O R C A R B O N F I L M 0 .2 5W 5 % 2 K 7 R E S I S T O R CA R B O N F I L M 0.2 5 W 5 % 1 K O R E S I S T O R CA R B O N F I L M 0.2 5W 5 % 2 K7 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 2 K 7 R E S I S T O R C A R B O N F I L M 0.2 5 W 5 % 2 K 7 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 2 K 7 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 1 K O R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 8 K 2 R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 8 K 2 R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 4 K 7 R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 6 K 8 R ES I S T O R C A R B O N F I L M 0 . 2 5W 5 % 3 K 9 R E S I S T O R CA R B O N F I L M 0.25W 5 % 2 K 7 R E S I S T O R CA R B O N F I L M 0 . 2 5W 5 % 3 K 9 R E S I S T O R C A R B O N F I L M 0 . 2 5 W 5 % 6 80 R R E S I S T O R C A R B O N F I L M 0.2 5W 5 % 2 K 7 R E S I S T O R CA R B O N F I L M 0 .2 5 W 5 % 1 K O R E S I S T O R CA R B O N F I L M 0 . 2 5W 5 % 2 K 7 R E S I S T O R CA R B O N F I L M 0.2 5 W 5 % 4 K7 R E S I S T O R M E T A L F I L M 0 .2 5W 1 % 5 6 R R E S I S T O R CA R B O N F I L M 0.2 5W 5 % 1 K O R E S I S T O R CA R B O N F I L M 0 . 2 5W 5 % 6 K 8 R E S I S T O R TH I C K F I L M 0.5W 2 % 27 R R E S I S T O R M E T A L F I L M 0.2 5W 1 % 5 6 R R E S I S T O R TH I C K F I L M 0 . 5 W 2 % 27 R R E S I S T O R TH I C K F I L M 0 . 5W 2 % 27 R R E S I S T O R TH I C K F I L M 0 .5 W 2 % 27 R R E S I S T O R TH I C K F I L M 0 . 5 W 2 % 27 R R E S I S T O R C A R B O N F I L M 0 .2 5W 5% 6 K 8 R E S I S TO R TH I C K F I L M 0 . 5 W 2 % 27 R
C O M PO N E N T L I S T TR 9 TR 1 0 TR 1 1 TR 1 2 TR 1 5 TR 1 6 TR 1 7 TR 1 8 TR 1 9 TR 2 0 TR 2 1 TR 2 2 TR 2 3 TR 2 4 TR 2 5 RN 1 RN 2 RN 3 RN 4 RN 5 RN 6 RN 7 VR 1 VR 2 VR 3 DN 1 DN 2 DN 3 DN 4 R 1 R 2 R 3 R 4 R 5 R 6 R 7 R 8 R 9 R 10 R 1 1 R 12 R 13 R 1 4 R 15 R 16 R 17 R 1 8 R 1 9 R 20 R 21 R 22 R 23 R 24 R 25 R 26 R 27 R 28 R 29 R 30 R 31
1 00-002 1
2 95 5 5 0 1 00-00 1 6 2 90 0 5 6 2 90 0 56 2 95 5 5 0 2 9 0 0 56 2 90 0 56 2 95 5 5 0 2 95 5 5 0 2 95 5 5 0 2 95 5 5 0 2 95 5 5 0 2 95 5 5 0 2 95 5 5 0 1 00-00 1 5 173 1 04 173 1 04 173 1 04 173 1 04 1 7 3 1 03 1 7 3 1 03 1 7 3 3 32 1 6 6 1 03 1 66 1 03 1 6 6 1 03 1 0-0 1 50 1 0-0 1 50 1 0-0 1 50 1 0- 0 1 5 0 1 3 1 33 1 1 3 1 1 02 1 3 1 22 1 1 3 1 1 03 1 3 1 6 81 1 3 1 1 03 1 3 1 333 1 3 1 333 1 3 1 333 1 3 1 6 82 1 3 1 47 1 1 3 1 47 1 1 3 4 3 92 1 34 241 1 3 1 27 2 1 3 1 47 1 1 3 1 3 92 1 3 1 1 02 1 3 1 33 1 1 3 1 1 02 1 3 1 1 02 1 3 1 6 81 1 32 1 00 1 3 3 0 47 1 3 1 6 82 1 3 1 1 51
1 3 1 1 02 1 31 6 81 1 3 1 102 131
1 02
1 3 1 332
5 -5
P P 3 9 P CB
IS S U E
6
TRAN SISTOR 2 N5 55 0 3 T R A N S I S TO R H E A T S I N K A S S Y T R A N S I S TO R M P S A 5 6 T R A N S I S TO R M P S A 5 6 T R A N S I S TO R 2 N5 5 5 0 T R A N S I S TO R M P S A 5 6 T R A N S I S TO R M PS A 5 6 T R A N S I S TO R 2 N 5 5 5 0 T R A N S I S TO R 2 N 5 5 5 0 T R A N S I S TO R 2 N 5 5 5 0 T R A N S I S TO R 2 N5 5 5 0 T R A N S I S TO R 2 N 5 5 5 0 T R A N S I S TO R 2 N 5 5 5 0 T R A N S I S TO R 2 N5 5 5 0 8 T R A N S I S TO R H E A T S I N K A S S Y R E S I S T O R N E TW O R K 8 R S S I L 1 0 0 K R E S I S TO R N E TW O R K 8 R S S I L l O O K R E S I S T O R N E TW O R K 8 R S S I L l O O K R E S I S T O R N E TW O R K 8 R S S I L 1 0 0 K R E S I S T O R N E TW O R K S I L 8 R S S I L 1 0 K R E S I S TO R N ETW O R K SIL 8 R S SIL 1 0 K R E S I S T O R N E TW O R K 8 R S SIL 3 K 3 P O T 3 / 8 SQ C E R M E T 1 0 K P O T 3 / 8 SQ C E R M E T 1 0 K PO T 3 / 8 S Q C E R M E T 1 0K 8 P I N DI O D E P A C K 1 N 4 1 5 0 8 P I N D I O DE P A C K 1 N 4 1 5 0 8 P I N D I O D E PAC K 1 N4 1 5 0 8 PIN D I O DE P A C K 1 N 4 1 5 0 R E S I S T O R C A R B O N FIL M 0 . 2 5W 5 $ 3 3 0 R R E S I S T O R C A R B O N FIL M 0 . 2 5W 5 $ 1 K O R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 2 2 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 1 0 K R E SIS T O R C A R B O N F I L M 0 . 2 5W 5 $ 6 80 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 1 0 K R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 3 3 K R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 3 3 K R E S I S TO R C A R B O N F I L M 0 . 2 5W 5 $ 3 3 K R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 6 K 8 R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 47 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 47 0 R R ES I S TO R M E TA L F I L M 0 . 2 5W 1 $ 3 K 9 R E S I S TO R M E TA L FIL M 0 . 2 5W 1$ 2 4 0 R R E S I S TO R C A R B O N FIL M 0 . 2 5 W 5 $ 2 K 7 R E S I S TO R C A R B O N F I L M 0 . 2 5W 5 $ 47 0 R R E S I S TO R C A R B O N F I L M 0 . 2 5W 5 $ 3 K 9 R E S I S TO R C A R B O N FIL M 0 . 2 5 W 5 $ 1 K O R E S I S T O R C A R B O N FIL M 0 . 2 5W 5 $ 3 3 0 R R E S I S TO R C A R B O N F I L M 0 . 2 5W 5 $ 1 K O R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 1 K O R E SIS T O R C A R B O N F I L M 0 . 2 5W 5 $ 6 80 R R E S I S T O R CA R B O N F I L M 0 . 5W 5 $ 1 0 R R E S I S TO R CA R B O N F I L M 1 W 5 $ 4 R7 R E S I S T O R C A R B O N FIL M 0 . 2 5 W 5 $ 6 K 8 R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 1 5 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 1 K O R E S I S T O R C A R B O N F I L M 0 .25W 5 $ 6 80 R R E S I S T O R C A R B O N F I L M 0 .25W 5 $ l K O R E S I S TO R C A R B O N F I L M 0 .2 5W 5 $ 1 K O R E S I S T O R C A R B O N F I L M 0 . 2 5W 5$ 3 K 3
COM PON ENT LIST R EG 1 R EG 2 R EG 3 CON 1 CON 2 CON 3 CON 4 CON 5 IC 1 IC 2 IC 3 IC 4 IC 5 IC 6 IC 7 IC 8 IC 9 IC 1 0 IC 1 1 IC 1 2 IC 1 3 IC 1 4 IC 1 5 IC 1 6 IC 17 IC 1 8 IC 1 9 I C 20 IC 2 1 I C 22 IC 23 IC 2 4 IC 25 I C 26 I C 27 IC 2 8 IC 2 9 IC 30 IC 3 1 I C 32 IC 33 IC 34 IC 35 IC 36 I C 37 IC 3 8 IC 3 9 IC 4 0 IC 41 IC 42 IC 43 IC 44 IC 45 IC 46 I C 47 TR 1 TR 4 TR 6 TR 7 TR 8
1 00-002 1
3 0 6 2 07 30 6 2 4 1 306 3 1 7 4 6 2 0 38 4 6 2 1 05 4 6 3 0 25 46 2 1 0 0 4 6 2 1 05 32 0 2 5 5 3 20 93 7 20-006 4 31 3 1 0 9 3 1 3 1 09 3 20 5 5 1 3 1 3 1 09 3 0 8 007 3 1 5 489 31 7 06 4 31 5 4 8 8 31 7 0 6 4 31 7 1 1 6 1 00-000 9 31 7 06 4 3 1 7 06 4 40 1 02 8 3 1 3 1 38 3 1 7 06 4 313 1 38 3 1 7 06 4 3 1 8 81 6 1 00-00 1 0 3 1 7 06 4 3 1 3 1 32 3 17 064 3 2 0 0 80 1 72 1 01 3 1 3 1 57 3 1 3 1 57 3 1 0 006 3 20 2 5 5 3 20 2 5 5 320 255 1 72 22 1 1 72 22 1 3 1 4 004 1 72 22 1 3 1 4 004 1 72 2 2 1 3 1 4 339 3 1 6 524 3 1 4 07 2 3 1 6 524 3 1 4 072 3 1 6 524 3 1 4 07 2 2 90 0 56 2 95 5 5 0 2 95 5 5 0 2 90 0 5 6 2 90 0 56
5-6
P P3 9 PCB
IS S U E
6
V O L TAG E R EG U L A T O R 7 8 L 1 2 V O L T AG E R EG U L A T O R 7 9 L 1 2 V O L TAG E R EG U L A T O R L M 3 1 7 T MO L E X C O N N E C T O R 1 3 W AY 2 2 - 0 3 - 2 1 3 1 C O N N E C T O R D I N F E M A L E 4 8 W AY C O N N E C T O R D - TY P E 2 5 W AY F E M A L E R I G H C O N N E C T O R D I N F E M A L E 6 4 W AY C O N N E C T O R D I N F E M A L E 4 8 W AY I / 0 P O R T 8 2 55 D I S P L AY D R I V E R 1 0 9 3 7 P - 4 0 MO D I F I E D T D K 1 8 6 7 P S U I C D I G I TA L 7 4 L S S E R I E S 7 4 LS 1 0 9 I C D I G I TA L 7 4 L S S E R I E S 7 4 LS 1 0 9 UA R T S Y 6 5 5 1 A I C D I G ITA L 7 4 L S S E R I ES 7 4 LS 1 0 9 C R Y S T A L O S C I L L A TO R 1 6 . 0 0 0 MH Z I C B U F F E R DS 1 4 8 9 6 LI K D R A M I C B UF F E R DS 1 4 8 8 6 4K DRAM RAM 6 1 1 6 F P L A 82 S 1 53 P P 3 9 I C 1 4 6 4K D R AM 6 LI K D R A M O I L S O C K E T 2 8 W AY I C D I G I TA L 7 LI L S S E R I E S 7 LI L S 1 3 8 6 LI K D R A M I C D I G I T A L 7 LI L S S E R I E S 7 LI L S 1 3 8 6 LI K D R A M E E P R OM 2 8 1 6 A F P L A 8 2 S 1 53 P P 3 9 I C2 3 6 LI K D R A M I C D I G I T A L 7 LI L S S E R I E S 7 LI L S 1 3 2 6 LI K D R A M P R OC E S S O R Z 80 R E S I S TO R N E TW O R K 8 R S 1 0 0 R I C D I G I TA L 7 LI L S S E R I E S 7 4 L S 1 57 I C D I G I TA L 7 4 L S S E R I E S 7 4 L S 1 57 I C D I G I TA L 7 4 S E R I E S 7 4 0 6 I / 0 PO R T 82 5 5 I / 0 PO R T 8 2 5 5 I / 0 PO R T 82 5 5 R E S I S T O R N E TW O R K 8 R S 2 2 0 R R E S I S T O R N E TW O R K 8 R S 2 2 0 R T R A N S I S T O R A R R AY U L N 2 0 0 4 R E S I S TO R N E TW O R K 8 R S 2 2 0 R T R A N S I S TO R A R R A Y U L N 2 0 0 4 R ES I S TO R N E TW O R K 8 R S 2 2 0 R Q U A D C O M P A R A T O R L M3 3 9 D T O A C O N V E R TO R A D 7 5 2 4 B I F E T O P A M P TL07 2 D T O A CO N V E R T O R A D 7 5 2 4 B I F ET OP A M P TL07 2 D T O A C O N V E R T O R AD 7 5 2 4 B I F E T O P A M P TL07 2 T R A N S I S TO R M P S A 5 6 TR A N S I S T O R 2 N 5 5 5 0 TR A N S I S TO R 2 N 5 5 5 0 T R A N S I S TO R M PS A 5 6 T R A N S I S TO R M PS A56
CO M PO N E N T L I S T R EG 1 R EG 2 R EG 3 R EG 4 R EG 5 CO N 1 CON 2 VR 1 VR 2 R 1 R 2 R 3 R 4 R 5 R 6 R 7 R 8 c 1 c 2 c 3 c 4 c 5 c 6 c 7 c 8 c 9 c 10 c 1 1 c 12 c 13 c 14 c 15 c 16 M 1 M 2 M 3 M 4 M 5 M 6 M 7 M 8 M 9 M 10
1 00-003 1
3 06 4 0 5 3 06 3 1 7 3 06 2 1 5 3 06 3 1 7 306 3 1 7 46 2 0 40 46 2 0 4 0 1 6 6 1 03 1 6 6 1 03 1 3 1 56 2 1 34 241 1 3 4 6 82 1 3 1 223 1 34 2 41 1 3 1 1 83 134 241 1 3 1 47 2 1 2 9 47 0 1 2 9 47 0 1 2 9 47 0 1 1 0 0 40 1 1 0 0 40 1 1 0 03 9 1 1 0 03 9 1 1 0 042 1 1 0 01 9 1 23 1 00 1 23 1 00 1 23 1 00 1 23 1 00 1 23 1 00 1 20 1 02 1 20 1 02 26 0 0 0 4 26 0 004 26 0 004 26 0 005 1 00-0032 43 4 0 0 4 400 0 6 0 400 060 400 060 400 060
5-7
P P 3 9 PS U P CB
IS SUE
3
V O L T AG E R EG U L A T O R L M 3 4 0 T5 V O L T AG E R EG U L A T O R L M 3 1 7 T V OL TAG E R EG U L A T O R L M 3 2 0 T 1 5 V O L T AG E R EG U L A T O R L M 3 1 7 T V OL TAG E R EG U L A T O R L M 3 1 7 T MO L EX C O N N E C T O R 1 1 W AY 1 0 - 1 6 - 1 1 1 1 M O L E X C O N N E C T O R 1 1 W AY 1 0 - 1 6 - 1 1 1 1 P O T 3 / 8 SQ C E R M E T 1 0 K P O T 3 / 8 SQ C E R M E T 1 0 K R E S I S TO R C A R B O N F I L M 0 . 2 5W 5$ 5 K 6 R ES I S T O R M E TA L F I L M 0 . 2 5W 1 $ 2 4 0 R R E S I S TO R M E T A L F I L M 0 . 2 5W 1 $ 6 K 8 R ES I S TO R C A R B O N F I L M 0 . 2 5W 5 $ 2 2 K R E S I S TO R M E T A L F I L M 0 . 2 5W 1 � 2 4 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 1 8 K R E S I S TO R M E T A L F I L M 0 . 2 5W 1 � 2 4 0 R R ES I S TO R C A R B O N F I L M 0 . 2 5W 5 � 4 K 7 C A P . S E R I E S Y 0 . 0 0 47 u F 2 5 0 V a c C A P . S E R I ES Y 0 . 0 0 47 u F 2 5 0 V a c C A P . S E R I E S Y 0 . 0 0 47 u F 2 5 0 V a c C A P A L EL E C A X I A L 1 0 0 0 u F 6 3 V CA P A L EL E C AXIAL 1 00 0 u F 6 3 V C A P A L EL E C A X I A L 47 0 0 u F 1 6 V C A P A L EL E C A X I A L 47 0 0 u F 1 6 V C A P A L EL E C AX I AL 2 2 0 0 u F 2 5 V C A P A L EL E C AX I AL 1 0 0 0 u F 2 5 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P M U L T I LAY E R C E R AM I C 0 . 1 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V CAP M U LTI LAY E R CE RAMI C 0 . 1 uF 50V C A P M U L TI L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P R ES I N DI P P E D TAN T 1 0 u F 3 5 V C A P R ES I N DI P P E D TAN T 1 0 u F 3 5 V R E C T I F I E R W 02 R E C T I F I E R W 02 R E C T I F I E R W 02 R E C T I F I E R KB P C 1 0 2 P P 3 9 P S U P CB P I EZ O A L A R M P KB 8 - 4 A O S OL D E R P I N D/ S S OL D E R P I N D/ S S OL D E R P I N D/ S S OL D E R P I N D/ S
5 .3
Items L ists
5 .3 . 1 5 .3 .2 5 .3 .3 5 .3 . 4 5 .3 . 5 5 .3 .6 5 . 3 .7 5 .3 . 8
PP39 PP39 P P3 9 PP3 9 PP3 9 PP39 P P3 9 PP39
Assembly Cover Moul d ing As sy Ma i nboa rd Base Assy Hea tsi nk ( 87 Rs ) Hea t s i nk ( 32 RS ) Cabl eform Assy PSU Boar d
5-8
1 00-0000 1 00-0003 1 00-002 1 1 00-0002 1 00-00 1 5 1 00-00 1 6 1 00-00 1 4 1 00-003 1
I T EMS L I S T 1 0 0 - 0 0 0 0 ITEM
1 2 3 4 5
PART NO .
P P 3 9 ASSY
ISS UE
D E S CR I PT I O N
1 00-0003 P P 3 9 C O V E R MO U L D I NG AS S Y P P 3 9 MA I N B D ASSY 1 00-002 1 P P 3 9 B A S E AS S Y 1 00-0002 43 2 1 00 S C R EW P A N H E A D S U P A S T E E L M 3 X 6 4 3 2 1 92 W AS H E R S H A K E P R O O F M 3
5-9
2 U N I T Q TY
1
1 1
12 12
ITEMS LIST 1 00 - 0 0 0 3 ITEM 1 2 3 4
PAR T N O . 1 00-00 50 1 00-00 5 9 1 00-0055 1 00-0052
P P 3 9 C O V E R H I D I NG
DE S C R I PT I O N PP39 PP3 9 P P3 9 PP3 9
C O V E R MO U L D I NG LAB EL FI LTER M E MB R A N E P A N E L
5-10
AS S Y
ISSUE
1 U N I T Q TY 1 1 1 1
I TEMS L I S T 1 0 0 - 0 0 2 1
I TEM 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 1 8 1 9 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
44 45 46 47 48 49 50 51 52 53 54
55 56
PA R T N O.
1 3 1 1 02 1 3 1 1 03 1 3 1 1 51 1 3 1 221 1 3 1 27 1 1 3 1 27 2 131 331 1 3 1 332 1 3 1 333 1 3 1 3 92 1 3 1 47 1 1 3 1 47 2 1 3 1 47 3 1 3 1 56 1 1 3 1 6 81 1 3 1 6 82 1 3 1 822 1 32 1 00 1 3 3 0 47 1 34 241 1 3 4 3 92 1 3 4 56 0 1 3 5 1 80 1 3 5 27 0 2 84 1 4 8 2 8 8 1 07 2 0-006 4 1 00-000 9 1 00-00 1 0 1 72 1 01 1 7 2 22 1 3 0 8 0 07 3 1 0 006 3 13 1 09 3 1 3 1 32 313 138 3 1 3 1 57 3 1 4 004 3 1 4 07 2 3 1 4 339 3 1 5 488 3 1 5 4 89 3 1 6 524 3 1 7 06 4 317 1 16 3 1 8 81 6 3 2 0 0 80 320 2 55 3 20 5 5 1 3 2 0 93 7 40 1 02 8 1 7 3 1 03 1 73 1 04 1 73 332 1 1 0 0 07 1 1 0 0 43
P P 3 9 P CB
IS S U E
6
DES C R I PTION R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 � 1 K O R ES I S T O R C A R B O N F I L M 0 . 2 5W 5 � 1 0 K R ES I S T O R C A R B O N F I L M 0 . 2 5W 5 � 1 5 0 R R ES I S T O R C A R B O N F I L M 0 . 2 5W 5 � 2 2 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 � 27 0 R R ES I S T O R C A R B O N F I L M 0 . 2 5W 5 � 2 K 7 R ES I S T O R C A R B O N F I L M 0 . 2 5W 5 � 3 3 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 $ 3 K 3 R E S I S TO R C A R B O N F I L M 0 . 2 5W 5 � 3 3 K R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 � 3 K 9 R E S I S T O R C A R B O N F I L M 0 . 2 5 W 5 � 47 0 R R ES I S T O R C A R B O N F I L M 0 . 2 5W 5 % 4 K7 R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 47 K R ES I S TO R CA R B O N F I L M 0 . 2 5W 5 % 56 0 R R E S I S T O R C A R B O N F I L M 0 . 2 5 W 5 � 6 80 R R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 � 6 K 8 R E S I S TO R C A R B O N F I L M 0 . 2 5 W 5 � 8 K 2 R ES I S T O R C A R B O N F I L M 0 . 5 W 5 � 1 0 R R ES I S T O R C A R B O N F I L M 1 W 5 � 4 R7 R ES I S T O R M E T A L F I L M 0 . 2 5W 1 � 2 4 0 R R E S I S T O R M E TA L F I L M 0 . 2 5W 1 � 3 K 9 R E S I S TO R M E T A L F I L M 0 . 2 5 W 1 � 5 6 R R E S I S TO R TH I C K F I L M 0 . 5 W 2 % 1 8 R R E S I S T O R TH I C K F I L M 0 . 5 W 2 � 27 R DI O DE 1 N 4 1 4 8 DI O DE Z EN E R 1 . 3W B ZX 6 1 C 1 5 V MO DI F I E D T D K 1 8 6 7 P S U F P L A 82 S 1 53 P P 3 9 I C 1 4 F P LA 82 S 1 53 P P 3 9 IC23 R E S I S TO R N E TW O R K 8 R S 1 0 0 R R E S I S T O R N E TW O R K 8 R S 2 2 0 R C R YS TA L O S C I L LATO R 1 6 . 0 0 0 M H Z I C DIG I TA L 7 4 S E R I ES 7 4 0 6 I C D I G I TA L 7 4 L S S E R I E S 7 4 L S 1 0 9 I C D I G I TA L 7 4 L S S E R I E S 7 4 L S 1 3 2 I C D I G I TA L 7 4 LS S E R I ES 7 4 L S 1 3 8 I C D I G I T A L 7 4 L S S E R I E S 7 4 L S 1 57 T R A N S I S TO R A R R A Y U L N 2 0 0 4 BIFET O P A M P TL07 2 Q UAD CO M P A R AT O R L M 3 3 9 I C B U F F E R DS 1 4 8 8 I C B UF F E R DS 1 4 8 9 D TO A CO NV E R TO R A D 7 52 4 6 4K DRAM RAM 6 1 1 6 E EP R OM 2 8 1 6 A P R OC E S S O R Z 80 I / 0 PO R T 8 2 5 5 UART SY6 5 5 1 A D I S P L A Y D R I V E R 1 0 93 7 P - 4 0 OI L S O C K E T 2 8 W A Y R ES I S TO R N E TW O R K S I L 8 R S S I L 1 0 K R ES I S TO R N E TW O R K 8 R S S I L 1 0 0 K R ES I S T O R N E TW O R K 8 R S S I L 3 K 3 C A P A L EL EC RADI A L 1 uF 6 3 V C A P A L EL E C A X I A L 4 7 u F 1 0 V
5-11
U N I T Q TY 18 2 3 1 1 13 6 3 4 3 7 2 3 1 7 7 2 2 1 1 1 2 2 7 38 1 1 1 1 1 4 1 1 3 1 2 2 2 3 1 1 1 3
8
1 1 1
4 1 1 1 2 4
1 2
1
I TEMS L I S T 1 0 0 - 0 0 2 1 ITEM 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
PAR T N O . 1 1 0 044 1 20 1 04 1 23 0 1 1 1 23 1 00 1 2 3 47 4 1 24 1 0 2 1 24 5 6 2 1 00-00 1 5 1 00-00 1 6 290 0 56 2 95 5 5 0 3 0 6 207 3 06 2 4 1 3 06 3 1 7 1 6 6 1 03 3 0 8 003 462 03 8 46 2 1 0 0 46 2 1 0 5 46 3 0 2 5 1 0-0 1 50 1 00-00 1 4 1 00-0022 309 1 65 3 1 8 764 4 0 0 060
P P 3 9 P CB
IS S U E
6
DE S C R I PT I O N C A P A L EL E C A X I A L 1 0 0 u F 1 0 V C A P R E S I N D I P P E D T A N T 1 .5 u F 3 5 V C A P C E R A M I C P L A T E 47 0p F 6 3 V C A P M U L T I L AY E R C E R A M I C 0. 1 u F 5 0 V C A P M U LTI LAY E R C E R A M I C 0 . 47 u F 5 0 V C A P M U L T I L AY E R C E R A M I C 1 0 0 0p F 5 0 V CA P M U L T I L AY E R C E R AM I C 5 6 0 0 p F 5 0 V 8 T R A N S I S TO R H EA TS I N K A S S Y 3 T R A N S I S TO R H E A TS I N K A S S Y T R A N S I S TO R M P S A 5 6 TR A N S I S TO R 2 N5 5 5 0 V O L TAG E R EG U L A T O R 7 8 L 1 2 V O L T AG E R EG U L A T O R 7 9 L 1 2 V O L TAG E R EG U L A T O R L M 3 1 7 T P O T 3 / 8 SQ C E R M E T 1 0 K C R YSTAL 1 . 8 43 2 MHZ MO L E X C O N N E C T O R 1 3 W AY 2 2 - 0 3 - 2 1 3 1 C O N N E C T O R D I N F E M A L E 6 4 W AY C O N N E C T O R D I N F E M A L E 4 8 W AY C O N N E C T O R D- TY P E 2 5 W AY F E M A L E R IG H 8 P I N DI O D E PACK 1 N4 1 5 0 P P 3 9 CAB L E FO R M A S S Y P P 3 9 P CB D I S P L AY F I P 1 6 A 5 R E PR OM 27 6 4 S OL D E R P I N D/ S
5- 12..
U N I T Q TY 1 3 4 23 3 1 1 1
1 7 1 1 1 1 1 3 1 1 1 2 1
4 1 1 1 1 1 1
I TEMS L I S T 1 0 0 - 0 0 0 2 ITEM 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 1 8 1 9 20 21 22 23 24 25
PA R T N O . 1 00-0 0 1 3 1 00-003 1 1 00-00 1 2 1 0 0 - 0 0 56 1 00-005 8 1 00 - 0 06 1 400 0 4 1 4 0 0 0 52 46 2 0 2 5 4 0 0 0 80 400 030 Bo o o o 2 67 0 1 03 620 003 43 2 1 00 43 2 1 0 2 4 3 2 3 07 4 3 2 1 03 432 3 91 43 2 1 0 1 4 3 2 1 92 43 2 3 92 43 3 0 91 43 2 1 90 43 2 3 90
P P 3 9 BAS E ASSY
ISSUE
DES C R I PT I O N P P 3 9 BAS E S C R E EN ED P P 3 9 P S U P CB AS S Y P P3 9 TRAN SFO R M E R P P 3 9 B LA N K I NG P L A T E P P3 9 S I L PAD P P 3 9 S R B P I N S U L A T I NG PA N EL F U S E 2 0 m m . Q U I C K B LOW 2 A . C A B L E S L E EV E H 3 0 M A I N S CO N N ECTOR B L 27 2 3 I N S U L A T O R B AS E I E C - T0- 2 2 0 - 1 8 P L AS T I C B U M P - O N FO O T 2 I N CH D/ S I D E D T A P E L I N E N F A N E T R I 1 1 5 V 9 9 X M - 0 1 - 82 0 0 0 C A B L E & P L UG f or E T R I S E R I E S 9 9 F A N S C R EW P A N H E A D S U P A S T E E L M 3 X 6 S C R EW P A N H E A D S U P A S T E E L M 3 X 1 0 S C R EW P A N H E A D S U P A S T E E L M 6 x 3 0 S C R EW P A N H E A D S U P A S T E E L M 3 X 1 2 W AS H E R F L A T S T E E L M 6 S C R EW P A N H E A D S U P A S T E E L M 3 X 8 W AS H E R S H A K E P R O O F M 3 W AS H E R S H A K E P R O O F M 6 W AS H E R P L AS T I C M 3 F U LLNUT STEEL Z I N C & CL EAR M3 FU LLNUT STEEL M6
5- 13
2 U N I T Q TY 1 1 1 1 1 1
1 7 1 5 4 1 1 1 2 5 1 3 1 4 17 2 3 8 1
I T EMS L IS T 1 0 0 - 0 0 1 5 ITEM 1 2 3 4 5 6
PART N O . 1 00-006 2 1 00-006 4 2 90 2 5 1 43 2 1 03 4 3 2 1 92 4 3 2 1 90
P P 3 9 H/ S I N K AS S Y
( 8T R S )
5- 14-
2 U N I T Q TY
DES C R I PT I O N 8 T R A N S I S TO R H E A TS I N K 8 T R A N S I S TO R S I L PA D P P 3 9 T R A N S I S T O R MJ E 2 5 1 S C R EW P A N H E A D S U P A S T E E L M 3 X W AS H E R S H A K E P R O O F M 3 F U L L N U T S TE EL Z I N C & C L EAR M 3
ISSUE
12
1 2 8 4 8 4
I TEMS LIST 1 00 - 0 0 1 6 ITEM 1 2 3 4 5 6
PA R T N O . 1 00-006 3 1 00-0065 2 90 2 5 1 43 2 1 02 4 3 2 1 92 43 2 1 90
P P 3 9 H/ S I N K A S S Y ( 3 T R S )
5-15
1 U N I T Q TY
D E S C R I PT I O N 3 T R A N S I S TO R H EATS I N K 3 T R A N S I S TO R S I L PA D P P 3 9 T R A N S I S T O R MJ E 2 5 1 S C R EW P A N H E A D S U P A S T E E L M 3 X W AS H E R S H A K E P R O O F M 3 F U L L N U T S T E E L Z I N C & C L E A R M3
ISSUE
10
1 1 3 3 6 3
I T EM S L I S T 1 0 0 - 0 0 1 4 ITEM 1 4 9 16 17 1 8 1 9 20 21 22 23
PART N O . 46 2 46 2 400 6 80 6 80 6 80 6 80 6 80 6 80 6 80 6 80
041 01 5 0 49 009 010 01 1 01 5 02 1 013 01 4 022
P P 3 9 C / F O R M M A I N B D/ P S U
DES C R I PTION M O L EX C O N N E C T O R 1 1 W AY 1 0 - 0 1 - 1 1 1 4 M O L EX C O N T A C T 6 8 3 8 TL C A B L E T I E TYB 2 3 M W I R E R ED 2 4/ 0 . 2 W I R E G R EY 2 4 / 0 . 2 W I R E B LA C K 2 4/ 0 . 2 P V C EQ U I P . W I R E 2 4 / 0 . 2 m m G R E E N EQ U I P W I R E 2 4 / 0 . 2 m m B L U E W I R E B R OW N 1 6 / 0 . 2 W I R E O R A NG E 1 6 / 0 . 2 PV C EQ U I P W I R E 2 4 / 0 . 2 Y E L L OW
5-16
IS S U E
2 U N I T Q TY 1 10 1 1 1 1 1 1 1 1 1
I TEMS L I S T 1 0 0 - 0 0 3 1 I TEM 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 21 22 23
PA R T N O . 1 3 1 1 83 1 3 1 223 1 3 1 472 1 3 1 56 2 1 34 241 1 3 4 6 82 1 10 01 9 1 1 0 03 9 1 1 0 0 40 1 1 0 0 42 1 20 1 02 1 23 1 00 1 2 9 47 0 3 06 2 1 5 3 06 3 1 7 3 06 4 0 5 1 66 1 03 46 2 0 40 1 00-0032 26 0 0 0 4 26 0 005 400 060 43 4 0 0 4
P P 3 9 P S U P CB
IS S U E
DES C R I PT I O N R E S I S TO R C A R B O N F I L M 0 . 2 5W 5 % 1 8 K R ES I S TO R C A R B O N F I L M 0 . 2 5W 5 % 2 2 K R E S I S T O R C A R B O N F I L M 0 . 2 5W 5 % 4 K7 R E S I S TO R C A R B O N F I L M 0 . 2 5W 5 % 5 K 6 R E S I S T O R M E TA L F I L M 0 . 2 5W 1 % 2 4 0 R R E S I S TO R M E TA L F I L M 0 . 2 5 W 1 % 6 K 8 CA P AL UM EL ECTOLYT I C 1 0 0 0 u F 2 5 V CA P A L E L E C A X I A L 4 7 0 0 u F 1 6 V C A P A L EL E C AX I A L 1 0 0 0 u F 6 3 V CA P A L EL E C AX I A L 2 2 0 0 u F 2 5 V C A P R E S I N DI P P E D T A N T 1 0 u F 3 5 V C A P M U L T I L AY E R C E R A M I C 0 . 1 u F 5 0 V C A P . S E R I E S Y 0 . 0 0 47 u F 2 5 0 V a c V O L T AG E R EG U L A T O R L M 3 2 0 T 1 5 V OL TAG E R EG U LA T O R L M 3 1 7 T V O L TAG E R EG U L A T O R L M 3 4 0 T5 P O T C E R M E T 3 / 8 i n SQ 1 0K MO L E X C O N N E C T O R 1 1 W AY 1 0 - 1 6 - 1 1 1 1 P P 3 9 P S U P CB R E C T I F I E R W 02 R E C T I F I E R KB P C 1 0 2 S OL D E R P I N D/ S P I EZ O A L A R M P KB 8 - 4 AO
5-1 7
3 U N I T Q TY 1 1 1 1 3 1 1 2 2 1 2 5 3 1
3 1 2 2 1 3 1 4 1
6 .0
Compone nt Locat ion
6 .1 6 .2
1 00-002 1 1 00-003 1
Ma i nboa rd PSU Boa rd
6 -/
7.0
Circuit Diagrams
7.1 7.2
PP39 Mainboard PP39 PSU Board
7-/
100-0021 100-0031
8. 1
39H100 Module
8 . 1 .1 8 .1 .2 8 .1 .3
Component List Items List Circuit Diagram
8-/
COMPONENT LIST CON 1 CON 2 CON 3 CON 4 LED 1 LED 2 LED 3 LED 4 re 1 re 2 IC 3 re 4 re 5 re 6 re 7 VR 1 R 1 R 2 R 3 R 4 R 5 R 6 R 7 R 8 0 1 D 2 D 3 D 4 D 5 D 6 D 7 c 1 c 2 c 8 c 9 c 10 c 11 c 12 c 13 c 14 M 1 M 2
105-0001
401 128 401 128 462 104 462 104 309 209 309 209 309 209 309 209 401 428 323 373 323 373 313 000 3 13 122 172 221 172 221 167 10 4 131 472 131 224 131 221 131 221 131 271 131 271 131 271 131 271 28 4 148 284 1 48 28 4 148 284 1 48 2 84 1 48 2 8 4 1 48 284 1 48 123 100 123 012 12 4 103 124 103 12 4 103 124 103 12 4 103 124 10 3 124 103 318 7256 105-0002
8-2
39M100 PCB ASSY
ISSUE
3
TEXTOOL SOCKET 28 WAY TEXTOOL SOCKET 28 WAY CONNECTOR DIN MALE 48 WAY CONNECTOR DIN MALE 48 WAY LED TIL 209 LED TIL 209 LED TIL 209 LED TIL 209 28 WAY OIL CARRIER A28-KT-103d/HZ CMOS DIGITAL IC 74HC373 CMOS DIGITAL IC 74HC373 IC DIGITAL 7 4LS SERIES 7 4LSOO IC DIGITAL 7 4LS SERIES 7 4LS122 RESISTOR NETWORK 8RS 220R RESISTOR NETWORK 8RS 220R POT CITEC MPWT lOOK RESISTOR CARBON FILM 0. 25W 5$ 4K7 RESISTOR CARBON FILM 0. 25W 5$ 220K RESISTOR CARBON FILM 0. 25W 5$ 220R RESISTOR CARBON FILM 0. 25W 5$ 220R RESISTOR CARBON FILM 0. 25W 5$ 270R RESISTOR CARBON FILM 0. 25W 5$ 270R RESISTOR CARBON FILM 0. 25W 5$ 270ft RESISTOR CARBON FILM 0. 25W 5$ 270R DIODE 1 N4148 DIODE 1 N 41 48 DIODE 1N4148 DIODE 1N 4148 DIODE 1N4148 DIODE 1 N41 48 DIODE 1N41 48 CAP MULTILAYER CERAMIC 0. 1uF 50V CAP CERAMIC PLATE 4. 7pF 63V CAP MULTILAYER CERAMIC 10000pF 50V CAP MULTILAYER CERAMIC 10000pF 50V CAP MULTILAYER CERAMIC 10000pF 50V CAP MULTILAYER CERAMIC 10000pF 50V CAP MULTILAYER CERAMIC 10000pF 50V CAP MULTILAYER CERAMIC 10000pF 50V CAP MULTILAYER CERAMIC 10000pF 50V 256K E-PROM PP39 39M100 P CB
ITEMS LIST 105-0008 ITEM 1 2 3 12 20
PART NO.
39M100 MODULE ASSY
ISSUE
DESCRIPTION
39M100 PCB ASSY 105-0001 105-0009 PP39 39M100 TEXTOOL COVER SCREENED 100-0051 PP39 TEXTOOL COVER MOULDING 432 103 SCREW PANHEAD SUPA STEEL M3 X 12 432 192 WASHER SHAKEPROOF M3
8-3
2 UNIT QTY 1 1 1 5 5
ITEMS LIST 105-0001 ITEM 1 2 3 � 5 6 7 8 9 10 11 12 13 1� 15 16 17 18 19
PART NO. 131 221 131 22� 131 271 131 l.l7 2 2 8� 1 48 172 221 313 000 3 13 122 323 373 �01 �28 123 012 123 100 12� 1 03 167 1 0� �01 128 �62 1 0� 3 09 209 105-0002 318 7256
39M100 PCB ASSY
ISSUE
DESCRIPTION RESISTOR CARBON FILM 0.25W 5% 220R RESISTOR CARBON FILM 0.25W 5% 220K RESISTOR CARBON FILM 0.25W 5% 270R RESISTOR CARBON FILM 0.25W 5% �K7 DIODE 1 N�1 �8 RESISTOR NETWORK 8RS 220R IC DIGITAL 7�LS SERIES 7�LSOO IC DIGITAL 7�LS SERIES 7�LS122 CMOS DIGITAL IC 7�HC373 28 WAY DIL CARRIER A28-KT-103d/HZ CAP CERAMIC PLATE �.7pF 63V CAP MULTILAYER CERAMIC 0.1uF 50V CAP MULTILAYER CERAMIC 10000pF 50V POT CITEC MPWT 100K TEXTOOL SOCKET 28 WAY CONNECTOR DIN MALE �8 WAY LED TIL 209 PP39 39M100 PCB 256K E-PROM
8-4-
3 UNIT QTY 2 1 4 1 7 2 1 1 2 1 1 1 7 1 2 2 � 1 1
8 .2
3 9H200 Hodul e
8.2 .1 8.2.2 8.2.3
Component List !tans Lists Circuit Diagran
8-6
COMPONENT LIST CON 1 CON 2 LED 1 LED 2 LED 3 LED 4 IC 1 IC 2 IC 3 IC 4 IC 5 IC 6 IC 7 IC 8 IC 9 IC 10 IC 11 IC 12 IC 13 re 14 IC 15 TR 1 DN 1 R 1 R 2 R 3 R 4 R 5 R 6 R 7 R 8 D 1 D 2 D 3 D 4 D 5 D 6 D 7 c 1 c 2 c 3 c 4 c 5 c 6 c 7 c 8 c 9 c 10 c 11 M 1 M 2 M 12 M 15
105-0211
46 2 104 46 2 104 309 209 309 209 309 209 309 209 310 136 313 109 313 373 313 373 321 040 105-0208 105-0207 401 1 40 401 140 401 140 401 128 401 024 317 116 317 116 401 028 290 056 10-0150 131 271 131 271 131 271 131 271 131 47 1 131 47 1 131 471 131 1 02 284 148 284 148 284 148 284 148 284 148 284 148 284 148 124 103 124 103 124 103 124 103 124 1 03 124 103 124 103 123 100 123 100 123 100 123 100 105-0212 340 004 318 716
318 7256
8-7
39M200 PCB ASSY
ISSUE
1
CONNECTOR DIN MALE 48 WAY CONNECTO R DIN MALE 48 WAY LED TIL 209 LED TIL 209 LED TIL 209 LED TIL 209 IC DIGITAL 74 SERIES 74136 IC DIGITAL 74LS SE RIES 74LS109 IC DIGITAL 74LS SE RIES 74LS373 IC DIGITAL 74LS SERIES 74LS373 DIGITAL CMOS CD4040B FPLA 82S153 39M200 IC6 FPLA 82S153 39M200 IC7 TEXTOOL SOCKET 40 WAY TEXTOOL SOCKET 40 WAY TEXTOOL SOCKET 40 WAY TEXTOOL SOCKET 28 WAY OIL SOCKET 24 WAY RAM 6116 RAM 6116 DIL SOCKET 28 WAY TRANSISTO R MPS A56 8 PIN DIODE PACK 1N4150 RESISTO R CA RBON FILM 0.25W 5S 270R RESISTOR CARBON FILM 0.25W 5S 270R RESISTO R CARBON FILM 0. 25W 5S 270R RESISTOR CARBON FILM 0.25W 5S 270R RESISTOR CARBON FILM 0.25W 5S 470R RESISTOR CARBON FILM 0.25W 5% 470R RESISTOR CARBON FILM 0.25W 5% 470R RESISTOR CARBON FILM 0. 25W 5% 1KO DIODE 1N4148 DIODE 1N4148 DIODE 1 N4148 DIODE 1N4148 DIODE 1N4148 DIODE 1N4148 DIODE 1N4148 CAP MULTILAYE R CERAMIC 10000pF 50V CAP MULTILAYE R CERAMIC 10000pF 50V CAP MULTILAYE R CERAMIC 10000pF 50V CAP MULTILAYE R CERAMIC 10000pF 50V CAP MULTILAYER CERAMIC 10000pF 50V CAP MULTILAYE R CE RAMIC 10000pF 50V CAP MULTILAYE R CE RAMIC 10000pF 50V CAP MULTILAYE R CE RAMIC 0. 1uF 50V CAP MULTILAYE R CE RAMIC 0.1uF 50V CAP MULTILAYE R CE RAMIC 0.1uF 50V CAP MULTILAYE R CE RAMIC 0.1uF 50V PP39 39M200 PCB RELAY RS 349 399 FORM C EPROM 2716 256K E-PROM
ITEMS LIST ITEM
PART NO.
1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 21 22 23 24 25
1 3 1 1 02 1 3 1 271 1 3 1 47 1 284 1 48 1 05-0207 1 05-0208 3 1 0 1 36 3 1 3 1 09 3 1 3 373 317 1 16 32 1 040 401 024 40 1 028 40 1 1 28 40 1 1 40 1 23 1 00 124 1 03 2 90 056 462 1 04 309 209 1 0-0 1 50 1 05-02 1 2 31 8 71 6 3 1 8 7256 340 004
105-0211
39M200 PCB ASSY
ISSUE
DESCRIPTION RESISTOR CARBON FILM 0.25W 5% 1KO RESISTOR CARBON FILM 0.25W 5% 270R RESISTOR CARBON FILM 0.25W 5% 470R DIODE 1 N4148 FPLA 82S153 39M200 IC7 FPLA 82S153 39M200 IC6 IC DIGITAL 74 SERIES 74136 IC DIGITAL 74LS SERIES 74LS109 IC DIGITAL 74LS SERIES 74LS373 RAM 6 1 16 DIGITAL CMOS CD4040B OIL SOCKET 24 WAY OIL SOCKET 28 WAY TEXTOOL SOCKET 28 WAY TEXTOOL SOCKET 40 WAY CAP MULTILAYER CERAMIC 0. 1 uF 50V CAP MULTILAYER CERAMIC 1 0000pF 50V TRANSISTOR MPS A56 CONNECTOR DIN MALE 48 WAY LED TIL 209 8 PIN DIODE PACK 1N4 1 50 PP39 39M200 PCB EPROM 27 1 6 256K E-PROM REL AY RS 349 399 FORM C
1 UNIT QTY 1 4 3 7 1 1 1 1 2 2 1 1 1 1 3 4 7 1 2 4 1 1 1 1 1
