9. CIRCUIT DIAGRAM
1
2
3
6
5
4
7
9
8
10
11
12
A
A
G4 G3
TX
RX G2 G1
WCDMA_TX
ANT
C1012 22p
WCDMA_RX
N1002 DFYK61G95LBNCB
B
B W1001 KMS-507
C1013
GSM_TX
RF
G2 G1
C1000 3.9p ANTPAD
ANT
22p
DCS_TX
C
WCDMA
GSM900_TX
16 4 2
L1001 6.8nH
ANT
VC2 VC1
VDD
L1002 6.8nH
9 10
11
1
C
2
C1011 22p
R1007
DCS_RX
5
1
GSM1900_RX
GND4 GND3
R1002 NA
C1010 1000p
GSM900_RX GSM1800_1900_TX
3
VCCB
GND1 GND5
4
V1001 RN47A4
GND2
GSM1800_RX
15 13 5 7 3
N1000 LMSP54MA-213
8
6
14
VCG
12
51
GSM_RX ANTSW3
R1001
R1006
NA
0 R1005
ANTSW2
0 R1004
ANTSW1
0 R1003
ANTSW0
0
D
D
C1007 0.01u
C1001 10p
C1009 10p
C1003 0.01u
C1008 10p
C1002 0.01u
C1004 0.01u
C1005 10p
E
E
R1810
VDD_A
VCCA 0 R1811
VDD_B
VCCB
0 C1810 10u 2012
C1802 10u 2012
C1811 10u 2012
N1800 LP2985AIBP-2.8 R1804
EXTLDO
5
ON_OFF
GND
NA
F
BYPASS R1800
4
VIN
VOUT
NA
1 2
F R1801
3
NA
NA
VBATI
C1800 0.1u
C1801 1000p
R1825
V_wivi_A 0
R1851 0 1 R1850
G
2
0
3 C1850 0.1u
C1852 10u 2012
VOUT
LP3981ILD-2.8 6 VEN
VIN
BYPASS
VOUT_SE
7 GND2
N1850
R1826
V_wivi_B
0
5
G
4 GND1 C1851 0.033u
H
Engineer:
3G HANDSETS LAB. DEVELOPMENT GROUP 1
Drawn by: SG Kang
R&D CHK:
Changed by: SG Kang
1
2
3
4
5
6
7
- 235 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
10
H
LG ELECTRONICS INC.
SG Kang
Size:
TITLE:
A2
DOC CTRL CHK:
ANT SW to ANT
MFG ENGR CHK:
U8120 PT V1.3 STG INTEL PAM
QA CHK:
REV:
12 1 8 A
Drawing Number:
Page: 1
5:01:55 pm
11
12
9. CIRCUIT DIAGRAM
1
3
2
5
4
6
7
8
9
10
12
11
A
A
Z1420 TMX-M453 6
IN-
5 4
C1441 2200p
IN+
SHIELD
GND
OUT+
OUT-
C1443 1.2p
1 2 3
C1442 2200p
L1441 100nH
B
B
1608 C1453
RXQA
VCCB C1454
0.01u
RXQB 0.01u C1422 27p
C1451
RXIA
C1423 27p
C1452
0.01u
RXIB 0.01u R1410 0
R1401 0
R1760
C1421
R1440
MCLK
0
0 NA
L1760 1uH
L1422 68nH
C1761 82p
C
C C1760 0.01u
1608 C1448 C1447 0.01u 0.01u L1421 68nH C1403 22p
C1404 C1414 22p 0.01u
C1425 2200p
R1411 3.3K R1430
1608
C1424 22p
22p
L1401 2.2nH
C1400 NA
L1411 6.8nH
C1402 1000p
C1412 1.2p
IFOUT GNDMIX VCCIF IFINA IFINB VCCLF QRA QRB IRA IRB CDQ CDI GNDLF MCLK IFOUTB VCCMIX MIXINA MIXINB GNDBIAS GNDEME RFIN GNDBYP VCCRF GNDIF DATA CLK STROBE GLNA
N1400 LZT-108-5323
VCCREF XOIA XOIB VCCBUS IFLOA IFLOB GNDRFLO RFLOOA XOOA XOOB GNDREF GNDBUS REFON GNDVCO
INDBYP RFOUT VCCPLL VCCPHD PHDOUT VTUNE VCCVCO VCCRFLO RFLOOB XOOON RXON GNDPLL GNDPHD GNDTUNE
B1 C1 D1 E1 F1 G1 H1 J1 K1 C3 D3 E3 F3 G3
C1401
WCDMA_RX
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 C4 C5 C6 C7
C1444 22p
D
B10 C10 D10 E10 F10 G10 H10 J10 C8 D8 E8 F8 G8 H8
B1770 TSX-8A
O1
6
R1770
VCXOCONT
1K
10K C1770 0.01u
V1770 BBY58-02W
4
3 HOT2
GND2
2 GND1
HOT1 1
C1778
D 56p R1772 10K
IFLO IFLOBAR C1750 22p
RFLO R1505 NA
C1751 22p
RFLOBAR
5 4 G3 IN
O2
C1773 4.7p
13MHz
R1771
330p
47p
XOOA XOOB E
1 2 3
E
C1772
C1777
C1776 4.7p
K2 K3 K4 K5 K6 K7 K8 K9 K10 H3 H4 H5 H6 H7
C1413 1.2p
G2
B7752
G1
Z1400
VCCB
10 C1431 22p
C1407 22p
R1740 C1740 0.01u
VCCB
10
C1741 22p
L1402 NA R1721
R1730
0
R1720 5.6K C1721 390p
TP1401 TP1402 TP1403
C1730 0.01u
10
C1731 22p
C1722 NA
WDAT R1723
F
WRFLOOP
0
WCLK
F
C1720 5600p
WSTR R1431
GPRFCTRL
0 R2108
CLKREQ 100 FROM MARITA SIDE FOR POWER SAVING
G
G
H
Engineer:
3G HANDSETS LAB. DEVELOPMENT GROUP 1
Drawn by: SG Kang
R&D CHK:
Changed by: SG Kang
2
3
4
5
6
7
- 236 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
Size:
TITLE:
12 1 8 A
U8120 PT V1.3 STG INTEL PAM REV:
QA CHK:
A2
UMTS RX (WOPY)
DOC CTRL CHK: MFG ENGR CHK:
1
Drawing Number:
Page: 2
12:50:11 pm
10
H
LG ELECTRONICS INC.
SG Kang
11
12
9. CIRCUIT DIAGRAM
3
2
1
4
5
6
7
9
8
10
12
11
A
A
WCDMA_TX
OUT
GND4 GND3
GND1
IN
GND2
N1650 CE0401G95DCB000-TT1
R1633 NA
VBATI
B
B R1630
VCCWPA
R1629
0 N1630
13 14
9
11
10
R1623
VCC_DET
GND6
GND2
GND7
A1 A2
R1997 VDETECT
GND5
N1620 MAX1820ZEBC
0
0
GND3
RFOUT
GND4 12
0
R1621
WDCDCREF
RF9266
8
A3
0
VBATI 7
R1626 33K
C1636 NA
6
15
C
C1632 0.01u
16 17 18
VCC_BIAS2
VCC22
VCC_BIAS1 GND1
GND8 VCC11
VCTRL2
VCC12
VCTRL1
5
GND9
RFIN 21
20
22 GND10 23 GND11
_SHDN
OUT
BATT LX
REF GND
PGND
B1 C1
VCCWPA
C2
3838 L1621 R1627
C3
WPOWERSENSE
4.7uH C4
C1623 10u 2012
39K L1601
C1624 4.7u
C1627 4.7u
C1626 330p
0
R1628 100K
L1602
C1628 1000p
L1603
C
4 3
L1604 NA
2
L1605 NA R1617
R1632 19 C1631 10p
B4
SYNC
COMP
C1622 22p
R1631 VCC21
A4
_SKIP
1
WPAREF 0
0
IFLOBAR C1635 NA
IFLO
RFLO C1714 100p
C1715 100p L1720
RFLOBAR
NA
V_wivi_A
C1716 L1507 75
D
4.7p
BLM15BB750SN1J
R1503 0
R1510 0
D
R1701
V_wivi_B
10
C1514 0.01u
C1511 10p
C1513 0.01u
C1510 0.01u
C1512 10p
C1702 22p
C1701 0.01u
C1602 22p
C1601 0.01u
C1509 10p R1603
V_wivi_A L1503 5.6nH
0
L1504 8.2nH C1504 10p
TP1701 TP1702
XOOA XOOB
4
C1508 VO
3
RTEMP
Z1500 SX-S205B
GND1 2 GND2 NC 5 1 LM20BIM7X
1 2 3
R1605 0
G1 S_OUT G2
B_IN2 G3 B_IN1
2.2p
6 5 4
G3 F3 E3 D3 C3 J1 I1 H1 G1 F1 E1 D1 C1 B1
V+
L1505 10nH C1507
R1606 NA
L1506 NA
R1604 NA
4p
C1505 22p
R1502 680 L1501
J2 J3 J4 J5 J6 J7 J8 J9 J10 H3 H4 H5 H6 H7
15nH
C1502 4p
0
F
OUT OUTBAR GNDRF MIXOUT MIXOUTBAR VCCIF IFBP IFBPBAR VTUNERF GNDRFLO2 GNDRF1 GNDRF2 GNDRF3 GNDIF
N1700 LZT-108-5322
E
QINBAR QIN INBAR IN VCCBB VCCIFPHD PHDIFOUT VCCIFPLL GNDIFVCO1 VCCIFVCO CLK GNDIFPHD GNDIFPLL WON
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 C4 C5 C6 C7
TXQB TXQA TXIB TXIA C1503 22p R1702 10
V_wivi_B C1704 22p
WDAT
C1703 0.01u
WCLK WSTR
H8 G8 F8 E8 D8 C8 I10 H10 G10 F10 E10 D10 C10 B10
R1501
V_wivi_A
GNDRFLO1 GNDIFLO DATA GNDBUS GNDBB VCCRF RFLOBAR RFLO VCCIFLO IFLOBAR IFLO VCCBUS XOOC XOOB
V_wivi_A E
TP1504 TP1503 TP1502 TP1501
GNDRFVCO2 STROBE GNDRFPLL TXON GNDRFPHD GNDRFVCO1 GNDTUNERF VCCRFVCO VCCRFPLL PHDRFOUT VCCRFPHD GNDIFVCO2 GNDTUIF VTUNEIF
B1501
F
L1502
C1501 47p
15nH R1504
R1711
680
V_wivi_B
R1710
0 C1712 NA
R1703
4.7K C1710 150p
C1711 3300p
0
G
G
H
Engineer:
H
LG ELECTRONICS INC.
SG Kang
3G HANDSETS LAB. DEVELOPMENT GROUP 1
Drawn by: SG Kang
R&D CHK:
Size:
TITLE:
A2
Changed by: SG Kang
1
2
3
4
5
6
7
- 237 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
10
DOC CTRL CHK:
UMTS TX (WIVI) to ISOLATOR
MFG ENGR CHK:
U8120 PT V1.3 STG INTEL PAM REV:
QA CHK:
Drawing Number:
12 1 8 A
Page: 3
5:04:02 pm
11
12
9. CIRCUIT DIAGRAM
1
2
3
4
6
5
8
7
11
10
9
12
VBATI
A
A BLM31PG601SN1 L1300 C1315 C1311 10u 10u 2012 2012
R1301 0
C1312 0.01u
C1313 22p
VDDBUF R1327
PASENSE+ 0 C1326 NA
0.05
0
BLM15AB601SN1J L1320
R1322
PAREG B IOUT
150p
R1321 1K
C1325 100p
V1330 2SD2216J NA
NA R1329 3K
C1322
VDIG
R1326
R1325
PASENSE-
C1323 100p
R1323 NA
B
R1324 NA
R1328 NA
FF_IN EXPOUT
C1321 470p
R1302
VDIG
C1320 470p
0
R1151
VDDPA 0
VSSPA
C1300 0.068u
C1156 0.01u
I2CDAT I2CCLK SYSCLK2 RESOUT3n
C
15 C1350 NA
C1351 NA
D
13
12 6
B2
1
4
NC
GND1
GND2
B1
4
3
L1330 33nH
33p 1 5
R1332 0
19 17 16 14 11
PGND GND7 GND6 GND5 GND4 GND3 GND2 GND1
TX_ENABLE BS
R1335
22p
22p
C1331 22p
22p
NC
GND2
B1
C1102
3
L1331 22nH
6
GND1
R1344 0
5
R1340 NA
2
R1342 NA C1337 22p
E3 B7714 4 6
10p L1100 3.9nH
C1333 10p
Z1100
O1
R1140 100K
C1100
IN
2
O2
DCS_RX
10p
G1 G2 G3
L1101 3.3nH
C1115 NA C1101
R1333
10p
TXON 0
C1114 7p
4
UB
0
75 C1336 NA
C1334
C1330 22p
N1331 LDB211G8020C B2
1
L1333
C1113
H7 F6 G6 E7
VCCA
0 L1332 75 BLM15BB750SN1J
R1341
C1335
E4 F2 F3 G1 B8 B6 C6 C7 C8 D6 D8 D7
UB
R1337 NA C1332
R1339 NA
6
3
5
2
SKY77321 N1300 RSVD
R1361 NA
VCC2
VAPC
EGSM_IN
DCS_PCS_OUT
R1350
10p
R1338 0
DCS_PCS_IN
EGSM_OUT
2
10
RXON
N1330 LDB21897M15C
1 3 5
DCS_TX
VSUPPLY
18 33p C1352
C1340 NA
0 0
R1345 NA
9 8 7
C1342 NA R1343
C1343 NA C1341
A8 A7 A6 A5 B4
A1 B1 C4 E8 F4 F7 G3 G4 H8
TP1143
TP1142
AVDD
D3 I2CDAT D1 I2CCLK G8 MCLK D2 RESETB
TP1151 TP1152
C1324 100p
VCC1
C1327 33p
GSM_TX
TP1141 F1
IRA IRB QRA QRB RXSTR
D5 QDAT A4 IDAT C5 DCLK
AUXO2 BEARP BEARN PCMUL GPDAT GPCLK
AUXI1 CCO MICIP MICIN DAC01 GPA0 DAC02 GPA1 DAC03 GPA2 N1101 GPA3 LZT-108-5321 GPA4 DACCLK GPA5 DACDAT GPA6 DACSTR GPA7 DEC1 PCMDL DEC2 PCMCLK DEC3 PCMSYN DEC4 ADSTR DEC5
H4 G5 H5 G7 E6 E5 C3 B3 A3
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6
C
VDIG R1150 0
VDIG_HERTA C1150 0.01u
C1151 NA
C1153 NA
C1155 NA
C2 C1 D4 E2 H2 H3 B2 E1
REXT VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9
QDATA IDATA DCLK
A2 B5 B7 F5 F8 H6
D
C1142 C1141 0.068u C1140 0.068u C1143 0.068u 0.068u
C1144 0.068u
VDIG_HERTA
G2 NC1 H1 NC2
R1113
RXON
C1112
E
33p
BSEL0 L1230
R1334 0
L1110 18nH
R1212
MODC R1210
MODD
C1230 NA
100
C1231 NA
C1111
100 K2 K3 K4 K5 K6 K7 K8 K9 K10 H3 H4 H5 H6 H7
L1200 100
VCCA C1201 0.01u C1271
XOOB R1272 NA
F
1000p L1201 5.6nH 1608 C1270
XOOA
4
GSM_RX
33p
5
L1111 10nH
1000p
NC5 MODA MODB MODC MODD VCCPLL XOOB XOOC NC6 GNDBUF NC3 PS GNDPLL XOOLA
R1121 NA
N1100 LZT-108-5325
RFHD RFHC GNDRF RFLB RFLA VCCRF QRB QRA IRB IRA REON CLK DATA STROBE
L1120
VCCA
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 C4 C5 C6 C7
C1104 0.01u
C1103 22p
R1103
R1250
R1104
0
0
R1105 0
F
R1106 0
R1240
H8 G8 F8 E8 D8 C8 J10 H10 G10 F10 E10 D10 C10 B10
R1273 NA
C1110 1
33p
100
C1205 22p
3 2 O1 G1 IN
G3 F3 E3 D3 C3 K1 J1 H1 G1 F1 E1 D1 C1 B1
R1211
PCTL BSEL RXON TXON GNDPLANE TXOHA TXOHB VCCBUF TXOLA TXOLB GNDRF2 RFHB RFHA GNDRF1
MODB
E Z1110 B7705
O2 G2
R1213
MODA
NC4 GNDVAR GNDVCO5 GNDVCO4 GNDVCO3 GNDVCO2 PHDOUT VTUNE VCCVCO GNDVCO6 GNDSILENT NC2 NC1 GNDVCO1
PCTL
GPRFCTRL
PULSESKIP
0 C1240 NA
0 C1250 NA
RADCLK
TP1201 L1220
G
C1225
R1220
R1224
VLOOP
G
C1221 0.01u
C1220 NA
RADSTR
TP1203 R1222
1800p
560
0
RADDAT
TP1202
2012
100uH
L1202
R1223
VCCA 120 C1224 1200p
390 C1222 560p
C1223 330p
C1203 22p
C1202 0.01u
H
Engineer:
3G HANDSETS LAB. DEVELOPMENT GROUP 1
Drawn by: JS Joo
R&D CHK:
Changed by: JS Joo
2
3
4
5
6
7
- 238 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
10
Size:
TITLE:
QA CHK:
A2
GSM/DCS (INGELA)
DOC CTRL CHK:
12 1 8 A
U8120 PT V1.3 STG INTEL PAM
MFG ENGR CHK:
1
H
LG ELECTRONICS INC.
JS Joo
REV:
Drawing Number:
Page: 4
7:25:06 pm
11
12
9. CIRCUIT DIAGRAM
2
3
5
4
6
7
9
8
10
11
12
DCIN_3
1
A
A
R3378 3.3K E
Q3203 DTA114EETL
VDIG B C
0.1u
4.7u C3013
C2211
4.7u
0.1u
C2213 C2214 0.1u 0.1u
C2212 0.1u
R2220
M12
0
A3 R2212
100K
R3026
VBAT_C
E1 C3246
LM20BIM7X
V+
VO
3
0.1u
C7 M10 L10 K10 L11 K11 J11 J10 J9 D9
RTEMP
R3384
VLOOP WPOWERSENSE WRFLOOP GPA6 VBACKUP
NA R3396
U3106 NA
B4
ADCSTR
0
4
D
A12
0
0
C2280 R2214 R2215
F11
0.1 0.05
F12
DCIN_2
C3271 47p
E
C3272 47p
VBAT
VBATI
C2607
NA
H10 G3 C6 E3 D10 B1 D4
2012 R3379
4.7 R3328 8.2K 1%
R3327 180K 1%
DACDAT DACSTR DACCLK
VBAT_B VDDBUCK VBAT_C PBUCK VBAT_D NBUCK
SWBUCK VBUCK VDD_IO
N2000 VINCENNE
BEARP BEARN
FGSENSE+
AUXO1 CCO
E10 G12 C12 E12 E11 D11 D12
MIC1P MIC1N AUXI1 MIC2P MIC2N AUXI2
TEST
GPA5 AUXO2 VSSTH31 VSSTH30 VSSTH29 VSSTH28 VSSTH27 VSSTH26 VSSTH25 VSSTH24 VSSTH23 VSSTH22 VSSTH21 VSSTH20 VSSTH19 VSSTH18 VSSTH17 VSSTH1 VSSTH2 VSSTH3 VSSTH4 VSSTH5 VSSTH6 VSSTH7 VSSTH8 VSSTH9 VSSTH10 VSSTH11 VSSTH12 VSSTH13 VSSTH14 VSSTH15 VSSTH16
VSSPA VDDPA_DAC VDDBUF PASENSE+ PASENSEPAREG IOUT
K1 PCMSYN J1 PCMCLK K2 PCMO J2 PCMI
PCMSYN PCMCLK PCMDATB PCMDATA VDIG
100K
R2218
M5
VDDCODEC
0 R3046 100K
C2209 0.1u
R3047
M3 C2210 0.1u
R3049
100K
100K
R2313
R2306 47
R2217
M9
0 C2207
G
0.1u
VDDBEAR
VDDADC
K8 VSSADC K5 VSSCODEC K4 VSSBEAR
1
IO1
2
EXTLDO
R2235
VBAT_C
R2202 0 R2203 1K 1608
1608
IO2
IO3
G2 5
1
D1 6
S1
4
SI1555DL
L2200 V2201 RB521S-30
A8 G10 F10
R2213 0.22
E4 F4 G4 H4 J5 J6 J7 J8 H9 G9 F9 E9 D8 D7 D6 F7 G7 G6 E5 E6 E7 E8 F8 G8 H8 H7 H6 H5 G5 F5 D5
22p C2614
C2615 10 0.068u
D2 D1
22p C2618
D3 C2610 22p
0.068u
C2 D5
HOOK C2611 100u
C2609 0.01u
R2620 0
SPKM C2606 0.33u 1608
C2632 22p
C3274 NA
C2312
C2303
0.1u
D
AMPCTRL
1 6 D VDD 2 5 S NC 3 4 GND IN
R2610 100K
SPKMUTE
C2604
IP4025CX20
MICP_INT
MICP MICN ATMS
MICN_INT
ATMS_CAP
ATMS_INT
AFMS_R
ATMS_AD
AFMS_L
AFMS_L_INT
VDD
A2
C2616
A1
22p
A3 A4
X2603 SUMY0004501
R2619
0
R2618
0
TP3318
EARP TP3319
C2630 22p
EARM
C2631 22p
22p
OBG-15S44-C2KU C3270 NA
R3397
E
0
C2613 0.033u
B4 A5 B5
C3266
C3277 NA 4.7uF, 2012
10p 5 2 3 4 6 1
C3 GND4 C4 GND5 C5 GND6
B1 GND1 B2 GND2 B3 GND3
C3268 47p
TJATTE2
D2016 RB521S-30
A2
0.1u
D4 AFMS_R_INT C1 CCO
C2617 0.068u
L2605
A3
33K
C3248
R2613
22K R2617
BYPASS
B2 SD_SEL SD_MODE B3 GND
C3221
C2608 1u 1608
VO1
IN+
VDIG
L2608 BLM15BB750SN1J
L9
K12 J4
C2
IN-
R2621 0
SPKP
N2603 ADG702
NA NA
N2602
C 22p L2606
C3
VO2
LM4898ITL
L2603 BLM15BB750SN1J
C2612
A1
0
C2206 2012 10u
C2633
R2609
C2619 100u
L4
VDD
3.9K
M4 C2638 C2637
B1
3.9K C2605 0.1u
R2607
TXON EXPOUT FF_IN
L3
33K
C1
10u 2012
VCORE
WDCDCREF WPAREF VCXOCONT
1u
R2608
10u 2012 VBATI
R2210
NA
1608
0
VMEM
VCORE
R3031 0
B5 G11 H11
C2603
BLM18PG121SN1 1608 120 OHM BEAD
22uH
ELL5GM220M CHOKE COIL
C3273 R2606 N2601
C2200
C2205
0.22
AUDIO AMP VBATI
VDIG
L2202
VBACKUP
C3247
S2
2 G1
TGBUZZ
NA
NA
C2202 4.7u
C2634
NA
4
0
VRTC
R2208 0.1u 3 D2
A1 B2 C3
R2615 C2635
R2200
Q2200
A5
1608 5
REF1
0
BACKUP BATTERY
R3345 0.51 2125
A4
M6 M7 L7 L6
R2614
KPD9D-8S-2.54SF
6
IO4
REF2
3
R2201 C2203 1u
C2302
V2300 DALC208SC6
VDD_B
M11 L12 L2
L8
FB4
22p
VDD_A
C11
M8
5 6 7 8 9 10
NA
A11
A2
P1 P5 P2 P6 P3 P7 P4 P8 GND3 GND1 GND4 GND2
0 NA
B12
FGSENSEVSS_A VSS_B VSS_C VSS_D SUB VSSBUCK
100K
R3045
DACO1 DACO2 DACO3 TXON EXPOUT FF_IN
R3043
VSSPA VDDPA VDDBUF PASENSE+ PASENSEPAREG IOUT
F
15K
MOD1 ADSTR GPA0 GPA1 GPA2 GPA3 GPA4 GPA6 GPA7 GPA12 GPA13
1 2 3 4 11 12
V3202 RB521S-30
BA3000
R3042 100K
X2300
VBAT_A
C9 DACDAT B10 DACSTR A10 DACCLK
R3041 100K
PT1 47K 1%
VDD_D VDD_E VDDLP
B11 BDATA B3 VIBR
R3382
MOTOR_BATT
0
EXTLDO
FB3
0
C2301 H3 G1 G2 F3 C2300 F2
R2305
0.05 R2216
Q2201 SI5441DC 1 8 D1 D6 2 7 D2 D5 3 6 D3 D4 4 5 G S
VDD_B
E2 DCIO D1 CHREG D3 CHSENSE+ D2 CHSENSE-
DCIN_3
NA 1608
VDD_A
VREF DEC0 DEC1 DEC2 IREF
100K
R3019 R2205
J12 L5 K6 K7 H12
TP3316 INDICATOR LED
1608 1u
NA
100K
R2101
VBATI
C2281
CDCDB
B6 L1 C2 F1
1u
VDIG
C
1 GND2 NC 2 GND1
SIMDAT SIMCLK SIMRST CDCDA
K9 MCLK C8 SDA B9 SCL K3 CLK_REQ C10 SLEEP
B
SIM HOLDER R3248
1000p
H1 SDAT J3 SCLK H2 SRST
SIMDAT0 SIMCLK0 SIMRST0
C2302 & C2303 CLOSER TO SIM SOCKET
1
10K
5
LED2 32KHZ SIMOFF SIMVCC
R2312
VDIG
RESOUT0n IRQ0n PWRRSTn
NA R3376 0
A6
2
0
TP2310
R2107
A9 C1 B8
R3294
TP2311
LED1
INTLCKB
M1 XTAL1 M2 XTAL2
R3002 TP3000
RESETB IRQ PWRRST
0
RTCCLK
VDIG
EN_LED_TC
R2314
C4 ONSWA C5 ONSWB A7 ONSWC B7
MCLK I2CDAT I2CCLK CLKREQ PWRREQn
1SS388
ROP-101-3029_2C
ONSWAn ONSWBn ONSWC
B
EN_LED_R 100K
R2106
D2010 C2621 TP3004
C3269 47p
C3267 NA
X2602
C3278 100p
VDIG
VEXT15
N2203 VDIG 2 C2274 1 0.1u
D2015 R3381 RB521S-30 47K
VSS
F
VOUT NC
3 C2272 4 1u 1608
S-817A15ANB-CUE-T2
R3385 NA R3395
VIN
GPA6
0 C3275 NA
R3303 100K
R3386 NA
1.5V REGULATOR
3.3V REG C2276 100p
N2204
PWRRSTn
3 2
VBUS
1
ON_OFF BYPASS
GPIO05
VIN
VOUT
IRDA_REG_CTRL
VBATI
3 2
5
LP2985IM5X-3.3
1
R2232 10K
USBSENSE
100K
C2277 4.7u
2.2u 2012
R3051
C2278
C3046 100p
N3000
VUSB
4
GND
ON_OFF BYPASS
G
4 VIRDA
GND VIN
VOUT
R3050 0 5
LP2985IM5X-2.8 C3052 4.7u
C3051 2.2u 2012
R2233 51K
IRDA REGULATOR
USB REGULATOR H
Engineer:
3G HANDSETS LAB. DEVELOPMENT GROUP 1
TAE-SUNG, HA
R&D CHK:
TITLE:
DOC CTRL CHK: MFG ENGR CHK: Changed by: mentor
1
2
3
4
5
6
7
- 239 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
10
QA CHK:
H
LG ELECTRONICS INC.
TAE-SUNG, HA
Drawn by:
REV:
Size: A2 BB MAIN PCB 12 1 8 A VINCENNE U8120 PT V1.3 STG INTEL PAM
Drawing Number:
Page:
7:25:29 pm
5
11
12
9. CIRCUIT DIAGRAM
2
1
3
4
5
6
7
8
9
10
11
12
* MEMORY CHANGE HISTORY
1.5V
1.5V
U8100 WS01-5
VRTC VEXT15
0
R2237
0
R3103
0
R2222
0
0
OPTION
0.1u C2220
0.1u C2218
C2101
0.1u C2223
0.1u C2222
0.1u C2244
0.1u C2243
0.1u C2247
0.1u C2256
0.1u C2246
0.1u C2250
0.1u C2255
0.1u C2253
0.1u C2257
0.1u C2262
0.1u C2252
0.1u C2263
0.1u C2260
0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4
64/64/16 64/64/16
0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4
128/128/64 128
0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4
U8100 ES01-6 TOSHIBA
128/128/64 128 128/128
0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4
OPTION
U8120 PT V1.1 Staggered INTEL
DAT(15) DAT(14) DAT(13)
R3325
R3110
22p
R2403
DAT(12)
TP3317
0.1u C2217
0.1u C2216
0.1u C2242
0.1u C2245
0.1u C2219
0.1u C2258
0.1u C2259
0.1u C2251
DAT(11)
0.1u C2261
DAT(10) DAT(9)
DAT(7)
NA
0
100
DAT(8)
B
DAT(6) DAT(5)
RTC_GND
TP2106
DAT(4)
DAC
DACCLK DACDAT DACSTR ADCSTR
USB
USBDP USBDM USBPUEN
1SS388
P3 P2 P4 P7 J15 J20 H19 N3 N8 N4 N7
HSSLRXCLK HSSLRX HSSLTXCLK HSSLTX
HSSL
F
D2012
L14 E5
TP2404 TP2405
K20 E1 J21 AA11 Y12 AA13 R14
NC0 NC
ADR(16)
ADR(21)
470 GND
7 C3137
IrDA
VCC
6 0.47u
RXD SHIELD TXD LEDK LEDA
KEY I/F
100K
ADR(22)
2
A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 _F3_CE A7 _F2_CE A6 _F1_CE A5 A4 S_CS2 _S_CS1 A3 A2 A1 _P1_CS _P2_CS U3103 A0 RD38F4050L0YTQ0 P_MODE CLK WAIT
H8 _F2_OE J2 _F1_OE H1 _R_OE
MEM_WE_N
F5 _F_WE D5 _R_WE
ADR(1:24) ADR(24) ADR(23) ADR(22) ADR(21) ADR(20) ADR(19) ADR(18) ADR(17)
DAT(2) DAT(3)
ADR(15) ADR(14) ADR(13) ADR(12) ADR(11) ADR(10) ADR(9) ADR(8) ADR(7) ADR(6) ADR(5) ADR(4) ADR(3) ADR(2) ADR(1)
MEM_BE1_N MEM_BE0_N
F3 _R_UB C2 _R_LB
B6 K6
VMEM
B5 L4
F1_VCC1 F1_VCC2
DAT(4)
B4 C4 L1 L2 L5 L6 L7 L8
DAT(5) DAT(6) DAT(7) DAT(8) DAT(9) DAT(10) DAT(11)
VMEM
DAT(12)
J8 K7 L3
VCCQ2 VCCQ1 VCCQ0
VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0
K4
S_VCC
D
K5
P_VCC
D4
F_VPP
C3133
DAT(13)
C3136 0.22u 50V 1608
DAT(14)
LCDRESX LCDCSX_SUB LCDWRX LCDRS LCDCSX_MAIN LCDRDX PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7
100K
0.1u
VPPFLASH_MEM
ADDRESS X DATA = 2^24 X 2^4 = 2^28 =256MBIT
A1 A2 A7 A8 M1 M2 M7 M8 DAT(0:15)
NA
Rout track on inner layer DAT(15) DAT(14) DAT(13) DAT(12) DAT(11) DAT(10)
LCD I/F
DAT(9) DAT(8)
VDIG
DAT(7) DAT(6) DAT(5) DAT(4) DAT(3) DAT(2) DAT(1) DAT(0)
I2CDAT CIPCLK CIVSYNC CIHSYNC CIRES_N CID0 CID1 CID2 CID3 CID4 CID5 CID6 CID7
CS1 MEM_CS1_N
J7 H6 G6 H5 J4 G4 J3 G2 H7 J6 G5 J5 H4 G3 H3 H2 K3 G8 K1 C5 J1
VMEM
CAMERA I/F
VDIG
D6 K2
MEM_CLK MEM_WAIT_N RESOUT0n MEM_ADV_N
K8 C6 G7
A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 _F3_CE A8 _F2_CE A7 _F1_CE A6 A5 S_CS2 A4 _S_CS1 A3 A2 _P1_CS A1 _P2_CS U3104 A0 NZ48F4000L0YBQ0 P_MODE CLK WAIT
H8 _F2_OE J2 _F1_OE H1 _R_OE
MEM_WE_N
F5 _F_WE D5 _R_WE
F2_VCC1 F2_VCC2
F1_VCC1 F1_VCC2
B4 C4 L1 L2 L5 L6 L7 L8
I2CCLK_CAMERA
PCM I/F
ADR(1:24)
E
F
VMEM
B6 K6
B5 L4
G
F3 _R_UB C2 _R_LB
R3333 NA
Short-256Mbit E3 Open-128Mbit D3 0 ADR(24) C3 R3399 C7 ADR(23) B7 ADR(22) E6 ADR(21) B3 ADR(20) B2 ADR(19) D2 ADR(18) F8 ADR(17) E8 ADR(16) F7 ADR(15) D8 ADR(14) C8 ADR(13) B8 ADR(12) E7 ADR(11) D7 ADR(10) F6 ADR(9) E2 ADR(8) F2 ADR(7) C1 ADR(6) B1 ADR(5) D1 ADR(4) E1 ADR(3) F1 ADR(2) G1 ADR(1)
FLASH
F4 _F_RST E4 _F_WP E5 _ADV
MEM_OE_N I2CCLK
A23 = 256Mbit, A22=128Mbit
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
VCCQ2 VCCQ1 VCCQ0
VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0
S_VCC P_VCC F_VPP
J8 K7 L3
C3276
C3222
K4
0.1u
0.1u
K5 D4
VPPFLASH_MEM
C3225 0.22u 50V 1608
1
Engineer:
3G HANDSETS LAB DEVELOPMENT GROUP1
Drawn by: SUNG-JU, YOU
R&D CHK:
SD(L:ACTIVE, H:SHUTDOWN) LOW POWER MODE : LEDA VCC
TITLE:
DOC CTRL CHK: MFG ENGR CHK: Changed by: mentor
4
5
7
6
- 240 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
10
REV:
QA CHK:
H
LG ELECTRONICS INC.
SUNG-JU, YOU
3
0.1u
RB521S-30 NA
MEM_WAIT_N
D19 C19 D18 C20 C21 E18 B18 D17 C18 B19 A20 H13 G14 B20 Y2 W3 H18 H15 G21 E19 E20 E21 H14 F19 F20 G18 G19 G20
0.1u
0 V2203
1K
MEM_CS3_N MEM_WE_N MEM_OE_N MEM_BE0_N MEM_BE1_N MEM_ADV_N MEM_CLK
C3135 C3134
VMEM R3400
R3319
MEM_CS0_N MEM_CS1_N
R3337
CS2 not used
DAT(15)
J8 H7 B10 D9 C8 D8 C1 D3 B9 G8 D2
SIR TRANCEIVER
2
B
ADR(16)
DAT(1)
H
1
A23 = 256MBIT
C
F2_VCC1 F2_VCC2
ADR(24)
DAT(0)
ADDRESS X DATA = 2^24 X 2^4 = 2^28 =256MBIT
MCP
MEM_OE_N
ADR(23)
4 3
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
27
8
5
R3346
SD
1608
MEM_ADV_N 100K
ADR(20)
VCORE
VIRDA
N3100 CIM-80S7B-T
R3338
ADR(19)
A
E3 D3 C3 C7 B7 E6 B3 B2 D2 F8 E8 F7 D8 C8 B8 E7 D7 F6 E2 F2 C1 B1 D1 E1 F1 G1
F4 _F_RST E4 _F_WP E5 _ADV
RESOUT0n
ADR(18)
VDIG
RTC_GND
MEM_CLK MEM_WAIT_N
ADR(17)
R2303 R3126
MARITATCK MARITATMS MARITATDI MARITATDO MARITATRST MARITARTCK MARITATEMU0 MARITATEMU1
R3323
ADR(15)
TP3117 TP3118
VDDMC VDDDM VDDUSB VDDRTC VDDA0 VDDA1 VDDA2
AA19 N1 R12 Y14 M20 D20 B12 R1 Y1 AA7 H20 A15 L21 A17 B1 K2 A9 B6 R20 M2 N2 Y10 C2 B16 A13 A11 B8 A5 A3 H2 U1 AA1 AA3 Y6 Y18 V20 N21 B21 A19 VDDC00 VDDC01 VDDC02 VDDC03 VDDC04 VDDC05 VDDC06 VDDC07 VDDC08 VDDC09 VDDC10 VDDC11 VDDC12 VDDC13 VDDC14 VDDC15 VDDC16 VDDC17 VDDC18 VDDE00 VDDE01 VDDE02 VDDE101 VDDE102 VDDE104 VDDE106 VDDE108 VDDE110 VDDE112 VDDE200 VDDE201 VDDE202 VDDE203 VDDE204 VDDE205 VDDE206 VDDE207 VDDE208 VDDE209
E2 J7 F3 F2 K4 K3 L7 G3 G2 K8 H4 G1 H3 K7 J2 J4 J3 J1 L8
HSSLRXCLK HSSLRX HSSLTXCLK HSSLTX
R2122 3.3K
R2121 NA
JTAG I/F
G
USBDP USBDM USBPUEN
W8 R10 Y9 AA9 V9 Y8 P11 V10 P20 P19 M15 L19 J14 J19 K19 K14 K15 N18 N19 N20 M19 L15 M18 P14 AA17 Y17 W17 V16 W18 AA15 Y15 W15 V15 W16 V3 W1 W2 V4 R13 V13 W14 Y13
TP2401 TP2402 TP2403
DACCLK DACDAT DACSTR ADCSTR
ADR(14)
100K
BL_EN FOLDER_DET EN_LED_R EN_LED_G EN_LED_B IRDA_REG_CTRL
PDIRES_N PDIC0 PDIC1 PDIC2 PDIC3 PDIC4 PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7 I2CSCL I2CSDA CIPCLK CIVSYNC CIHSYNC CIRES_N CID0 CID1 CID2 CID3 CID4 CID5 CID6 CID7
K8 C6 G7
ADR(13)
R3322
USBSENSE
MARITA
ADR(12)
NA
LCDVSYNCI SPKMUTE
E
ROP-101-3035_1
MEM_CS3_N
R3321
KEY_LED_ONOFF
CS0_N CS1_N CS2_N CS3_N WE_N OE_N MEMBE0_N MEMBE1_N MEMADV_N MEMCLK MEMWAIT_N
D6 K2
ADR(11)
R3320
PULSESKIP
D2000
VMEM
ADR(10)
3.3K
NA
R2301
TP2125
CAM_FLASH_SHOT
ADR(9)
Q3202 PMST3904
VDIG
ADR(8)
DAT(0:15) A7 B7 C7 D7 C6 B5 C5 D6 B4 C4 D5 B3 D4 C3 B2 A1
C5 J1
CS 0,3
ADR(7)
3.3K R3330
UART1
ADR(6)
TP3115 TP3116
UARTRX1 UARTTX1 UARTRTS1 UARTCTS1 CAM_REG_EN CAM_FLASH_ON
IRQ0n
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
MEM_CS0_N
1
UART0
CAMERA_DET GPIO05 AMPCTRL TGBUZZ UARTRX0 UARTTX0
GPIO00 GPIO01 GPIO02 GPIO03 GPIO04 GPIO05 GPIO06 GPIO07 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO30 GPIO31 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47
ADR(5)
R2304
BL_PWL 7C_LED_VDD_EN
TP3313
D
M14 P18 R21 R8 P9 AA2 Y3 W4 V5 Y4 V6 W5 Y5 AA5 W6 V7 W7 Y7 P10 P15 N14 W20 V19 W21 U18 T18 U19 U20 N15 U21 T19 T20 R19 R18 V17 AA21 Y19 AA20 W19 Y20
SIMDAT0 SIMRST0 SIMCLK0
100K
R2102
CLKREQ
ISSYNC_N ISEVENT_N IRQ0_N
J7 H6 G6 H5 J4 G4 J3 G2 H7 J6 G5 J5 H4 G3 H3 H2 K3 G8 K1
ADR(4)
4.7K R3329
M3 M4 V2
ISSYNCn ISEVENTn
DAT(0)
ADR(3)
2
PWRREQn
R2622
130K
C2104 1000p
R2105
RESOUT3n
C
0.8 PITCH 8 X 11 X 1.2 0.8 PITCH 8 X 11 X 1.0 0.8 PITCH 8 X 10 X 1.2
ADR(2)
3
TP2102
ADR(1)
TP3111 TP3112 TP3113 TP3114
RESOUT0n RESOUT1n
100K
R2104
PWRRSTn
C17 B17 G13 C16 C15 B15 H12 D14 B14 C14 G12 B13 C13 H11 D12 C12 G11 D11 C11 H10 C10 D10 H9 C9
4.7K
47
VSSMC VSSDM VSSUSB VSSRTC VSSA0 VSSA1 VSSA2
R2109
DAT(2) DAT(1)
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24
KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 KEYOUT5 KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4 PCMCLK PCMSYN PCMDATA PCMDATB
SYSCLK1 SYSCLK2
MCLK SYSCLK0 SYSCLK1 SYSCLK2 SERVICE_N RESPOW_N RESOUT0_N RESOUT1_N RESOUT2_N RESOUT3_N RESOUT4_N CLKREQ PWRREQ_N
ADR(1:24)
K18 E3 J18 R11 V12 W13 V14
TP3126
P13 R3 T2 T3 L3 R2 F4 L1 P8 U2 U3 M8 T4
VSSE00 VSSE01 VSSE02 VSSE100 VSSE102 VSSE104 VSSE106 VSSE108 VSSE110 VSSE112 VSSE200 VSSE201 VSSE202 VSSE203 VSSE204 VSSE205 VSSE206 VSSE207 VSSE208 VSSE209 VSSE210 VSSE211
330p
L4 M7 W9 E4 D15 D13 G10 G9 H8 A2 G4 R4 U4 R9 V8 Y16 V18 Y21 F18 A21 D16 L18
C2102
MCLK
100K
E
TP2101
100K
TP2100
R3127
R3100 NA Q2100 RN1107
DIRMOD0 DIRMOD1 DIRMOD2 DIRMOD3 DCLK IDATA QDATA TXON RXON RFCLK RFSTR RFDAT BANDSEL0 BANDSEL1 ANTSW0 ANTSW1 ANTSW2 ANTSW3 PCTL
B
120K
TCK TMS TDI TDO TRST_N RTCK TEMU0_N TEMU1_N IRRX IRTX IRCTRL MMCCLK MMCCMD MMCDAT MSSCLK MSBS MSSDIO SIMDAT0 SIMRST0_N SIMCLK0 SIMDAT1 SIMRST1_N SIMCLK1 KEYOUT0_N KEYOUT1_N KEYOUT2_N KEYOUT3_N KEYOUT4_N KEYOUT5_N KEYIN0_N KEYIN1_N KEYIN2_N KEYIN3_N KEYIN4_N PCMCLK PCMSYN PCMDATA PCMDATB TSYP TSYM TSXP TSXM
C
R2123
W10 RTCBDIS_N V11 RTCIN W11 RTCOUT P12 RTCDCON W12 RTCCLK
DAT(3)
VPPFLASH
256/64 256 option-128
DAT(0:15)
Rout track on inner layer
0
0.1u C2221
R2238
MODA MODB MODC MODD DCLK IDATA QDATA TXON RXON RADCLK RADSTR RADDAT BSEL0 GPRFCTRL ANTSW0 ANTSW1 ANTSW2 ANTSW3 PCTL 1 2
22p
4 MC-146 B2100
32.768KHz
C2100
3
C2100 and C2101 close to B2100
64/64/16 64/64/16 64D/64D/16PS 128L/128L
U8100 ES01-3 TOSHIBA
U8100 ES01-2
ONSWC
32.768KHz
0
RF I/F
47
R2221
RTCCLK
R2241
R2100
R2223
U8100 ES01-1 DEFAULT
TP3103
3.3V VUSB
0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.4 0.8 PITCH 9 X 12 X 1.25 0.8 PITCH 9 X 11.5 X 1.0
TP3102
VMEM
128/128/64 128 128/128/64 128 128/128/64 128
A1 A2 A7 A8 M1 M2 M7 M8
1.8V
VDIG
U8100 PT V1.0 Staggered TOSHIBA
DU0 DU1 DU2 DU3 DU4 DU5 DU6 DU7
2.75V
U8100 PT V1.0 NMBI TOSHIBA
U8100 PT V1.1 Staggered AMD
DU0 DU1 DU2 DU3 DU4 DU5 DU6 DU7
1.8V
VCORE VMEM
VCORE
0.8 PITCH 14 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4 0.8 PITCH 10 X 8 X 1.4
TP3101
VDDE 1.5V
VDDC 1.5V VEXT15
A
MCP 64/08. 64/64/16 64/64/16 64/64/16 64/64/16 64/64/16 64/64/16
TP3100
U8100 WS01-1 U8100 WS01-2 U8100 WS01-3 U8100 WS01-4 2002.09.13
VDDC 1.5V
Size: A2 BB MAIN PCB 12 1 8 A MARITA U8120 PT V1.3 STG INTEL PAM
Drawing Number:
Page:
9:42:54 am
6
11
12
9. CIRCUIT DIAGRAM
1
2
3
4
6
5
7
8
9
11
10
12
VBATI
A
VBATI
VCAM
7C_LED_VDD CAM_FLASH_ON CAM_FLASH_SHOT
G3
G4
10
11
9
12
8
13
R3388
R3263
0
4.7
1
7C_LED_VDD
AXK7L80225
2 3
CID4 BL_PWL FOLDER_DET
4 FB2
CID5
KEY_LED-
R3357
CIVSYNC
51
I2CCLK_CAMERA 7
14
6
15
5
16
R3366
51
4
17
R3367
51
3
18
2
19
R3365
CIPCLK
51
R3363
SYSCLK1
51
R3389
100
R3390
100
7C_LED_VDD_EN B
EN_LED_TC
C3260
C3259
C3258 20p
C3261
20p
12
6
5
4
1
2
3
C R3209
C3
20p
C1
ESD4
20p
A3
ESD3
CSPESD304
A1
ESD2
C3 ESD4
KEY_LED_ONOFF R3207
CAMERA I/F KEYPAD BACKLIGHT BLUE LED I/F D
R3210 Q3201
PCMDATA
R3223
0
R3225
NA
R3227 R3228
0 0
R3229 R3230
0 0
3 2
HF SPK P TP3204
TP3346
V2500
VBATI UARTRTS1
RB521S-30 NA R3206
UARTRX1 PCMDATB
0 NA
G R3235 NA
0 R3237
5
4
D2
D3
D4
6
NA
C3215
2.75V
C2208
33u
1u
3216
1608
H
Engineer: S .Y SEOK
LG ELECTRONICS INC.
S .Y SEOK
3G HANDSETS LAB. DEVELOPMENT GROUP1
Drawn by:
I/O CONNECTOR
R&D CHK:
TITLE:
DOC CTRL CHK: MFG ENGR CHK: Changed by: mentor
3
4
5
DTC SENSE TP3205
2
USB FILTER
GND
UARTTX1
D5
USBPUEN
SMF05C
NA
R2504
NA
C3212 1000p C3213 1000p C3219 1000p
R3341 TP3344
R2501
0
USBUF01W6
CRS08 V3200
1
TP3345
3
L2500 1 6 D1 D4 5 2 3_3V GND 3 4 D2 D3
VBAT
D1
NA
1K
R3232 R3233
NA
R2503
R2500
CAMERA_DET
R2319
F
V3201
VCAM
CAMERA ROTATION DETECTOR
BLM18PG121SN1 L2201
SP3205 SP3200 SP3206 SP3207 SP3201 SP3208 SP3202 SP3209 SP3203 SP3210 SP3211 SP3204 SP3212
NA
NA 0 NA
TP3202
0
USBDP
R3220 R3249 R3222
NA
HF MIC
C3220 0.1u
R2502
USBDM
20_5124_024_500_858 X3203 25 VBAT_GND_1 26 VBAT_GND_2 1 BATT_ID 2 HF_MODE 3 DSR 4 PWR_+5V_1 5 PWR_+5V_2 6 ON_SW1 7 PCM_RXA_IN 8 PCM_CLK 9 PCM_SYNC 10 USB_RX 11 PCM_TXA_OUT 12 PWR_GND_1 13 RXD 14 TXD 15 USB_TX 16 USB_PWR 17 DCD 18 RI_TMS 19 PWR_GND_2 20 RFR_RTS 21 PWR_+4_2V_1 22 PWR_+4_2V_2 23 CTS 24 DTR TP3307 27 V_BAT_1 5V 28 V_BAT_2 29 V_BAT_3 30 GND1 31 GND2
HF SPK N TP3203 Q2300 RN1107
VBUS
C3205 10p
1
R3252
PCMCLK PCMSYN
E
100K
NA
5
TP3338 TP3339 TP3343 TP3340
C B
PDM : ENEY0003301
VBACKUP
100K
VCC
A1 A2 A3 A4 A5 B1 B5
C2 C1 B4 B3 B2
TP3306
R2505
DTMS_e DFMS_e CTMS_e CFMS_e VPPFLASH_e CTS_ON_e DCIO_e
GND5 GND4 GND3 GND2 GND1
ONSWBn DCIN_3
IP4022CX20
DTMS_i DFMS_i CTMS_i CFMS_i VPPFLASH_i CTS_ON_i DCIO_i
100K 0.1u 0.1u 0.01u
NA
D2 D3 C3 D4 TP3337 D5 TP3336 D1 C5
UARTRX1 UARTTX1 UARTRX0 UARTTX0
R3347
C4
300K
UMC4N
VDIG
N2300 TP3342 TP3341
R3401
E
NA NA NA NA
R3398 C2304 C2500 C2279
240K
R3332
VBAT
C3245 10u R3331
R3211
KNATTE R3353 R3352 R3351 R3350
NA
4
TP3200
NA
VDIG
UARTCTS1
2
D2014 1SS388
CURRENT LIMIT
CAMERA REGULATOR
1
D2013 1SS388
15mA x 16 = 240mA
VPPFLASH_MEM VPPFLASH
N3200 A3212ELH 1 VDD 3 GND OUT 2
6
KEY_LED-
B2
GND
C1 ESD3
ESD1
A3 ESD2
CSPESD304 D2018
A1 ESD1
C3
B2
GND
C1
ESD4
D2009
A3
ESD3
G2
CSPESD304
A1
ESD2
C3 ESD4
ESD1
C1 ESD3
20
B2
GND
A3 ESD2
CSPESD304 D2008
A1 ESD1
B2
GND
C3249 20p
C3255
C3252 20p
1 G1
EMX18 Q3200
VCAM
100K
R3344
EN
C3201 1u 1608
8 7
12
F
C3204 0.1u
FID1
R3208
VBATI
G
CF2-
SUB LCD BACKLIGHT 4.5V
HF DETECTION
2012
FID0
10
9
CID7
DCIN_2
C3243 470p
GND
CID6
E
MIC5219BM5
CF1-
VIN
1608
I2CDAT
B'd to B'd CONNECTOR I/F
C3244 2.2u
CF1+
CIHSYNC
CID3
MARITATEMU1 MARITATEMU0 MARITARTCK MARITATRST MARITATDO MARITATDI MARITATMS MARITATCK
U3102 1 5 IN OUT 2 GND 3 4 EN ADJ
CF2+
FB1
CID0
EN_LED_R EN_LED_G EN_LED_B KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 KEYOUT5
CAM_REG_EN
SC600BIMSTR
VOUT
CHARGE PUMP
CIRES_N R3360
N3201
C3203 1u 1608
51
CID2
LCDCSX_SUB LCDRESX LCDVSYNCI LCDWRX LCDRS LCDCSX_MAIN LCDRDX PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7
C3202 10u 2012
51
CID1 EARM EARP BL_EN MOTOR_BATT SPKP SPKM
5
1608 R3364
NA
D
SC600B
PDM : ENBY0017602
D2007
C
1u 1608
X3201
20p
B
C3200
ONSWAn KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4
R3236
VDIG CONN_10_5087_060_920_829 X3200 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
2.7K
A
6
7
- 241 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
10
QA CHK:
REV:
H
Size: A2 BB MAIN PCB MULTIMEDIA INTERFACE 12 1 8 A U8120 PT V1.3 STG INTEL PAM
Drawing Number:
Page: 7
2:11:39 pm
11
12
9. CIRCUIT DIAGRAM
1
2
3
5
4
6
7
9
8
10
11
12
A
A 1.5V
1.5V
1.5V
VEXT15 WANDAVDDA
1.5V
VCORE WANDAVDDD
0
0
R2224
R2236
VCORE VRTC VEXT15
VCORE
B
B C2227 0.1u
C2229 0.1u
C2238 0.1u
C2234 0.1u
C2236 0.1u
C2241 0.1u
C2240 0.1u
C2239 0.1u
C2230 0.1u
C2232 0.1u
B2 EMIF_A23 E5 EMIF_A22 A1 EMIF_A21 A2 EMIF_A20 B3 EMIF_A19 C4 EMIF_A18 B4 EMIF_A17 E6 EMIF_A16 C6 EMIF_A15 A5 EMIF_A14 E7 EMIF_A13 B6 EMIF_A12 C7 EMIF_A11 A7 EMIF_A10 A8 EMIF_A9 E8 EMIF_A8 C8 EMIF_A7 E9 EMIF_A6 C9 EMIF_A5 B9 EMIF_A4 C10 EMIF_A3 A10 EMIF_A2 E10 EMIF_A1
B1 D2 G1 K2 M1 R1 T2 U5 R13 U16 R16 N17 K17 H17 F17 D16 A17 B14 A12 B8 A6 A3 L15 R12 T17 U6 U10 R11 JTAG_TRSTN JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO EMU1 EMU0
VDD21 VDD20 VDD19 VDD18 VDD17 VDD16 VDD15 VDD14 VDD13 VDD12 VDD11 VDD10 VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0 VDD_DPLL VDDA_CS_APLL VDD_CLK32 VDDA_TX VDDA_RX VDDA_BG
G16 G17 G15 F16 G13 E15 F13
47p
C3265
3.3K
R3380
VCORE
2.7K
R3383
VDIG
R17 RADIO_CLK P15 RADIO_DAT M13 RADIO_STR
WCLK WDAT
R3326
RXIA RXIB RXQA RXQB C2400
ADCSTR
N15 DAC_CLK L13 DAC_DAT M15 DAC_STR
DACCLK DACDAT DACSTR
E12 UART_TX C13 UART_RX
TP2119
F
C2225 0.1u
C
U11
TP2116
EMIF_D0 EMIF_D1 EMIF_D2 EMIF_D3 EMIF_D4 EMIF_D5 EMIF_D6 EMIF_D7 EMIF_D8 EMIF_D9 EMIF_D10 EMIF_D11 EMIF_D12 EMIF_D13 EMIF_D14 EMIF_D15 EMIF_D16 EMIF_D17 EMIF_D18 EMIF_D19 EMIF_D20 EMIF_D21 EMIF_D22 EMIF_D23 EMIF_D24 EMIF_D25 EMIF_D26 EMIF_D27 EMIF_D28 EMIF_D29 EMIF_D30 EMIF_D31
C2 C1 F5 E3 G5 E1 F2 F1 G3 G2 H5 H1 H2 J2 J3 J5 K3 K5 K1 L1 L3 M2 L5 N1 M3 M5 P2 P3 R2 T1 N5 U1
D
E
N12 EXT_MEM_UBUS10 T14 EXT_MEM_UBUS11 R14 EXT_MEM_UBUS12 E17 EXT_FRAME_STROBE
MCLK CLK32 HCLK CLKRQ RESET_N
VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSSA_CS_APLL VSSA_RX VSSA_TX VSSA_BG
U13 T16 R15 T15 N13
C2103 330p
MCLK RTCCLK
C2228 0.1u
U3 EMIF_AWE_N T3 EMIF_ARE_N U2 EMIF_AREADY
D4 ID_BALL A13 IS_SYNC_N B12 IS_EVENT_N U12 APLL_ATEST1
CLKREQ RESOUT1n
VINCENNE INTERFACE
ROP-101-3033_1
B16 HSSLRX_D A16 HSSLTX_CLK A15 HSSLTX_D C14 HSSLRX_CLK
HSSLTX HSSLRXCLK HSSLRX HSSLTXCLK ISSYNCn ISEVENTn
CLK INTERFACE
C2237 0.1u C2235 0.1u
CPU_IACK CPU_XF CPU_IRQ1 CPU_IRQ0 CPU_CLKOUT
N6 R5 N7 R6 M17
F TP2120
D3 F3 H3 L2 N3 R3 R4 T4 U15 U17 P16 L16 J16 H16 F15 C16 B15 C12 B11 B10 B7 C5 C3 T6 T12 N11 T8 R8 T11
HSSL LINK (MARITA)
D2006 DAC_I_OUT DAC_I_OUT_INV DAC_Q_OUT DAC_Q_OUT_INV DAC_TXEXTRES
GPO0 GPO1 GPO2 GPO3 GPO4 GPO5 GPO6 GPO7
E
N8 U8 U7 R7 T7
TXIA TXIB TXQA TXQB
ADC_I_IN ADC_I_IN_INV ADC_Q_IN ADC_Q_IN_INV ADC_RXEXTREF_P ADC_RXEXTREF_N AD_STR
L17 K13 K15 K16 J15 J13 H15 H13
RF TX DATA
R10 N10 R9 T9 T10 N9 0.1u M16
C17 BOOTMODE0 B17 BOOTMODE1 E13 BOOTMODE2 C15 BOOTMODE3
NA
BG_REF
RF RX DATA
D15 TESTMODE E11 ANALOG_ENABLE C11 APLL_BYPASS A11 CS_BYPASS
WSTR
PMST3904 1
3
Q3204
2
D
RF CONTROL
C2231 0.1u
100K
R2402
C
C2226 0.1u
100K
R2401
C2224 0.1u
C2233 0.1u
1%
TP2117
TP2321
TP2320
TP2322
G
R2120 NA
TP2118
C2215 0.1u
R2400 43K
G
H
Engineer:
3G HANDSETS LAB. DEVELOPMENT GROUP 1
MYUNG-LAE, CHO
R&D CHK:
TITLE:
DOC CTRL CHK: MFG ENGR CHK: Changed by: mentor
1
2
3
4
5
7
6
- 242 -
8
9
Date Changed:
Time Changed:
Tuesday, September 04, 2003
10
QA CHK:
H
LG ELECTRONICS INC.
MYUNG-LAE, CHO
Drawn by:
REV:
Size: A2 BB MAIN PCB 12 1 8 A WANDA U8120 PT V1.3 STG INTEL PAM
Drawing Number:
Page: 8
9:42:54 am
11
12
9. CIRCUIT DIAGRAM
1
2
3
4
8
9
10
12
11
A A
TVS2
NA
LCDVSYNCI LCDWRX LCDRS LCDCSX_MAIN LCDRDX PDID0 PDID1 PDID2 PDID3 PDID4 PDID5 PDID6 PDID7
LCDRESX R1145 R1140 R1141 R1142 R1143 R1144
LCDCSX_MAIN LCDRESX LCDVSYNCI LCDCSX_SUB LCDRS LCDRDX
100 100 100 100 100 100 C35
C36 C37
30p 30p 30p
EN_LED_R EN_LED_G EN_LED_B KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 KEYOUT5
R1146 R1147 R1148 R1149 R1150 R1153
PDID6 PDID4 PDID2 PDID0 BL_EN EN_LED_G
C40
30p 30p 30p
100 100 100 100 100 270 C43
C44 C45
30p 30p 30p
MARITATEMU1 MARITATEMU0 MARITARTCK MARITATRST MARITATDO MARITATDI MARITATMS MARITATCK
C38 C39
C46 C41
KEYIN4
KEYIN3
KEYIN2
KEYIN1
C23 C24 C22 470p 470p 470p KB6
KB11
4
7
KB7
KB12
KB17
5
8
0
KB8
KB13
KB18
6
9
#
KB9
KB14
KB19
470
KEYOUT0
470
KB16
KB21
TVS1
R1104 470
KB1
R1154
B
INSTPAR
C34
30p 30p 30p
R1102
SIDE3
UCLAMP0501H
C32 C33
SIDE2
1SS388
VA3
C30 C31
30p 30p 30p
470
AVL14K02200
C29
LCDCSX_SUB
END
CN964 1 2 3 4
R1103
VA1
EARM EARP BL_EN MOTOR_BATT SPKP SPKM
100 100 100 100 100 0
D1
VA2
R1134 R1135 R1136 R1137 R1138 R1139
BL_PWL PDID1 PDID3 PDID5 PDID7 LCDWRX
KEY_LED-
U8100_SIDEKEY_PAD SIDE1
KB26
AVL14K02200
BL_PWL FOLDER_DET
AVL14K02200
40 39 38 VBATI_4.2V 37 36 35 34 33 32 31 30 29 28 VDIG_2.8V 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 7C_LED_VDD 10 9 8 7 6 5 4 3 2 1 CN963
C28
47p 47p
INSTPAR
C27
KEYIN0
CONN_40_AXK840145J
270 270
CAM_FLASH_ON CAM_FLASH_SHOT
C
KEYOUT1
1
KB2
*
UP
KB22
KEYOUT2
2
C42
DOWN
30p 30p 47p
D KB3
KB23
6
4
5
3
2
D2
KEYOUT3
D5
D4
D3
D2
1
SPKM SPKP MOTOR_BATT CAM_FLASH_SHOT
3
NA
GND
D
R1152 R1151
D1
C
CAM_FLASH_ON EARP EARM EN_LED_R EN_LED_B
R1097
B
ONSWAn KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4
UCLAMP0501H
64 63 62 61 60 59 58 7C_LED_VDD 57 56 55 54 53 52 51 VDIG_2.8V 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CN962
ONSWAn
VBATI_4.2V
RIGHT
SMF05C
TOSHIBA LCD I/F
BOARD TO BOARD CONECTOR
KB4
KB24
E
E
U8100 KEY V0.8
2003.11.18
U8100 KEY PT V1.1
2004.01.14 ESD EMI FILTER -> RC Filter
KEYOUT4
LCDRESX PULL DOWN R MOVE TVS VDIG
SEND
BACK
CLEAER
KB5
GAME
KB15
KB10
KB20
LEFT KB25
KEYOUT5
MENU
MULTI
SEARCH
OK
CAM
F
F
KEYPAD
VBATI_4.2V
VDIG_2.8V
HSMR-C191
R1130
FOLDER_DET
U1 A3212ELH 1 VDD 3 GND OUT 2
QSMR-C138 LD17
QSMR-C138 LD16
QSMR-C138 LD14
C26 0.1u
C25 0.1u
G
C21 10p
36
QSMR-C138 LD12
QSMR-C138 LD11
QSMR-C138 LD13
R1131
36
QSMR-C138 LD10
QSMR-C138 LD9 R1100
QSMR-C138 LD8
QSMR-C138 LD7
QSMR-C138 LD6 36
QSMR-C138 LD5
R1099
QSMR-C138 LD4
QSMR-C138 LD3
QSMR-C138 LD2 36
R1098
QSMR-C138 LD1
QSMR-C138 LD20
47
R1133
QSMR-C138 LD19
QSMR-C138 LD18
100K
G
FOLDER OPEN DETECTOR
KEY_LED-
H
KEYPAD BACKLIGHT BLUE LED
Engineer:
LG ELECTRONICS INC.
Drawn by:
3G HANDSETS LAB. DEVELOPMENT GROUP 1
R&D CHK:
TITLE:
DOC CTRL CHK:
Changed by: mentor
1
2
3
4
5
6
7
- 243 -
8
9
Time Changed:
Date Changed:
REV:
QA CHK:
Size:
U8100 KEY PT V1.3
A2
BB KEY PAD PCB 2004.02.09
MFG ENGR CHK:
H
12 1 8 A
Drawing Number:
Page:
FEB,17,2003
1
10
11
12
10. PCB LAYOUT
- 244 -
10. PCB LAYOUT
- 245 -
10. PCB LAYOUT
- 246 -
10. PCB LAYOUT
- 247 -
