PSK decoder, differential decoding circuit, ARI in- dication and RDS signal quality output. This is advancedinformation on a new product now in developmentor ...
TDA7330B SINGLE CHIP RDS DEMODULATOR + FILTER ADVANCE DATA
HIGH PERFORMANCE, 57KHz BANDPASS FILTER (8th ORDER) FILTER ADJUSTMENT FREE AND WITHOUT EXTERNAL COMPONENTS PURELY DIGITAL RDS DEMODULATION WITHOUT EXTERNAL COMPONENTS ARI (SK INDICATION) AND RDS SIGNAL QUALITY OUTPUT 4.332MHz CRYSTAL OSCILLATOR (8.664MHz OPTIONAL) LOW NOISE MIXED BIPOLAR/CMOS TECHNOLOGY DESCRIPTION The TDA7330B is a RDS demodulator. It recovers the additional inaudible RDS information which is transmitted by FM radio broadcasting stations. The output data signal (RDDA) and clock signal (RDCL) can be further processed by a suitable RDS decoder (microprocessor). The device operates in accordance with the EBU (European Broadcasting Union) specifications. The IC includes a 2nd order antialiasing input fil-
DIP20 SO20 ORDERING NUMBERS: TDA7330B TDA7330BD
ter, a 57KHz switched capacitor band pass filter, a smoothing filter and cross detector, a bit rate clock recovery circuit, a 57KHz PLL, BI-PHASE PSK decoder, differential decoding circuit, ARI indication and RDS signal quality output.
BLOCK DIAGRAM
April 1993 This is advancedinformation on a new product now in developmentor undergoing evaluation. Details are subjectto change without notice. notice.
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TDA7330B ABSOLUTE MAXIMUM RATINGS Symbol
Parameter
VCC
Supply Voltage
Top Tstg
Value
Unit
7
V
Operating Temperature Range
-40 to 85
°C
Storage Temperature
-40 to 150
°C
THERMAL DATA Symbol Rth j-case
Description Thermal Resistance Junction-case
Typ.
DIP20
SO20
Unit
100
200
°C/W
PIN CONNECTION (Top view)
PIN FUNCTION
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Nr.
Name
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
MUXIN Vref COMP FIL OUT GND T1 T3 T4 OSC OUT OSC IN T57 RDCL RDDA QUAL ARI
16 17 18 19
VCC T2 FSEL TM
20
POR
Description RDS input signal. Reference voltage Not inverting comparator input (smoothing filter) Filter Output Ground Testing output pin (not to be used) Testing output pin (not to be used) Testing output pin (not to be used) Oscillator output Oscillator Input Testing output pin: 57KHz clock output RDS clock output (1187.5Hz) RDS data output Output for signal quality indication (High = good) Output for ARI indication (High when RDS + ARI signals are present) (High when only ARI is present) (Low when only RDS is present) (indefined when no signal is present) Supply Voltage Testing output pin (not to be used) Frequency selector pin: open = 4.332MHz, closed to VCC = 8.664MHz Test mode pin (open = normal RUN) (closed to VCC = Test mode) Reset Input for testing (active high)
(*) FSEL pin has an internal 40KΩ pull down resistor A 4.332MHz QUARTZ must be used (**) A 8.664MHz QUARTZ must be used.
DEMODULATOR ∆fO SRDS
Max Oscillator Deviation RDS Detection Sensitivity
SARI Tlock VOH
ARI Detection Sensitivity RDS Lockup Time Output HIGH Voltage
IL = 0.5mA; pins 12, 13, 14, 15
VOL fRDS tD
Output LOW Voltage Data Rate for RDS RDDA Transition versus RDCL
IL = 0.5mA; pins 12, 13, 14, 15 RDCL pin (see figure 2)
FSEL = Open
+ 1.2
KHz mVrms
1 3
mVrms ms V
100 4 1 1187.5 4.3
V Hz µsec
Note(1): The phase non linearity is defined as: ∆Ph = | -2 φf2 + φf1 + φf3 | where φfx is the input-output phase difference at the frequency fx (x = 1,2,3)
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TDA7330B ELECTRICAL CHARACTERISTICS (continued) Measure A
6. The Hamilton and Adams method [4] is illustrated for estimating the green (G) ..... Image Processing, vol. 1, 2001, pp. 141â144. [13] J. Go, K. Sohn, and C. Lee, ...
Aug 16, 1996 - IC20 Data Handbook .... Supply voltage during normal, idle, and power-down operation. P0.0âP0.2. 8â6. 9â7. I/O. Port 0: Port 0 is a ..... In I2C applications, this timer is dedicated to time-generation and bus monitoring of the .
and IF sections which allows good external circuit isolation by minimizing common ... transformer at the input as shown in Figures 5 and 6. For applications that ...
Characterized with Series Equivalent LargeâSignal Impedance Parameters. MAXIMUM ... Total Device Dissipation @ TC = 25°C ... PROTOTYPE (âXâ Status)â devices are preproduction products and may not be released or produced in volume. ..... 3.00
timer/counters, serial port and interrupt system to continue functioning. The Power Down ... during EPROM programming and program verifica- tion. Port 2: Port 2 ...
and 40% in 1.5(1)µs. Multiply and divide instructions require 3(2)µs. LOGIC SYMBOL. FEATURES. ⢠80C51 central processing unit. ⢠8k à 8 ROM expandable ...
Department of Electrical and Computer Engineering. University of .... currently underway and a high-level view of the approach is described in Section 6.
The ADXRS150 is a complete angular rate sensor (gyroscope) that uses Analog Devices' ..... with a supply-ratiometric ADC, the ADXRS150's 2.5 V output can.
Aug 16, 1996 - SU00001. SEE PAGE 3 FOR QFP AND LCC PIN FUNCTIONS. ..... code bytes during program verification in the 87C51. ...... All rights reserved.
May 13, 2000 - Single chip digital color/black&white video camera chip. ...... OV7620 must be blocked from light by using a mechanical shutter, so that the ...
Home Hi-Fi. Key features. ⢠Only 18 ... Fully integrated FM IF selectivity and demodulation ... radio solution occupies minimal PCB area (9x9 mm) making it ideal.
29 MHz - 956 MHz â Scan these frequency ranges with your scanner. (Note: the ... If any items are missing or damaged, immediately contact your place of purchase. Read this ... If the frequencies listed in the âBetty Bearcat Starter Frequency Guid
Dec 6, 1993 - required to program all counters, subsequent updating can be .... All counters have outputs directly synchronous with their respective clock ...
On-chip crystal oscillator/TCXO buffer from 3 to 16 MHz. ⢠16 reference .... control circuit to transfer the serial data into the four internal 8-bit ... temperature drift and high voltage supply rejection. A ..... input level sine wave (RMS value)
The defined modem strings(AT commands and answers) at chip.ini will pe printed at ...... This function opens and starts periodic ICMP echo request (ping) to a given remote host ...... The Web server of the IPC@CHIP uses an internal CGI table.
