SHARP PC-l500 & RADIO SHACK PC-2 ~~

o

CopyT~t

1til PCDET CCII'UTER IlEIISLETTER

MACHIl\E: LAN3lJAGE PRClGRPM'11N3

THO SHARP PC-l500 MIl Rl'DIO SHACK PC-2

PCCKET CO'f'UTERS

!

Hidden beneath the surface of pocKet computers such as the snarp PC-1500 and Radio snacK PC-2 models Is a secret world of unique and powerful capabilities. Alas, this world Is only open to the initiated whO have the willirq>ess a'lCl stanina to study a'lClleam macfline J~programmJng! Machine language progr~ing (or I"LP as it will freqJel1tly be referred to here) is really what makes the entire system work. Indeed, the BASIC language itself and all the capabilities of the pocket computer are prograrrmed in this most fLlkklllE!l'ltal)~

of themiclqJrocessoT.

I"LP is a .,.,.,.,Iex SUter as consisting of two essential divisions: (I) a CPU a'lCl (2)merrory.

The CPU (Gentral Processing Unit) in a pocKet COO'pUter is a microprocessor. That is, it is an Integrated circuit that is \he heart of \he system In the Sharp PC-lSOO \he CPU integrated circuit Is referred to as an LHS801. It is a proprietary device ~ especially for that pocket corrj)Uter. (Since \he Radio Shack PC-2 is simply a custom-~ version of \he Sharp PC-lSOO, I.I1less otherwise noted In this text, operation of the PC-2 can asstrned to be the same.) The nomenclature LHS80l has no special signiflca-oce to anyone o\her than the marufacturer. It Is essentially nothing more than a part number to identify that particular type of electronic device. A CPU such as \he LHS80l Is .ole to dO a nurTtler of essential operetions. But,baslcally what is dOes is transfer Information to and from memory. Part of what it transfers is Its O'Hn Instrl£tions. That is, the directives that tell it what to do! The memory elements in a COOlJUter hOld two basic types of information. Instructions that teU the CPU what to do and oata that is used to solve problems. To \he I.I1lnitiated it is Imposslbie to tell which parts of memory do what. Yoo will soon become among the initiated. A Step at a TIme A CPU essentially consists of a number of registers, some electronic paths that interconnect \hese registers, and an array of iogic-perfOrmlng circuits that control what happens within and between \he registers.

CPU

\~ _. Memory essentially consists of an orderly arrangement of registers and a method Of addressing or selecting each register. In theory \here could be '4l to 6S~36 registers (641
PROORfII COIfJER ..........1.. F.....

'/h

FI-

mathematical proceOOIes. Ma'ly M.- prograrrmers never have occasslon to make use of tills particular flag. The Interllpt enaDJe flag 0 flag) Is used to enable or disable a type of CPU inter""t capabU1ty prOVided for tile LHS801 CPU. Most programmers will not have to be concerned wltllits applications. Data PoInters and GeneraJ Purpose Registers Tne LHS801 has a whole g~ Of registers tIlat may be useo for several purposes. WhIle not having quite the versatility of the acamulator (in tIlat they generally lacI< "calculating" capabilities), never-the-Iess they come In very handy. There are six of these Qer1eJaJ .au.znw. 8-bit However~ they can be paired to form

registers.

ti1ree sets of 16-bit data pailltcI registers. When serving as a data pointer the contents of the register may be used to indicate an address In memory where data i, to be obtained or deposited. Note that wnen coupled together to fonn a 16-blt register tney can hold any address in the range 0 65,535, thus lIley can point to any valid address In memory that tne CPU Ie;; meoreUcally capable of

accessing. H V Z I

C

10101011111111111 FLAGS REGISTER The zero flag(Z flag) Is usea to Indicate If the crotents of a register are zero (flag set) or If the crotents of a register are non-zero (flag clearell~ Note the seemingly Inverse relatlonsnlp nere! The carry flag (C flag) Is set when tIlere Is a carry from tile most significant Olt of a register and cleared If tIlere Is no carry dUrIng an addition operation. ourtng suDtractlon It Is set If there is no borrow and Clearell If there Is a borrow. The carry flag can also be considered as ~ extension of a register cUing ceTtain types of opeT8t1ons sucn as SIllfts and rotates. It can also be Independently set or clearell by special instructions so tIlat Its status can be defined at times detennlneo by the progldllTJer.

The IIBJF carry Flag (H flag) Is set when there Is a cartY flom the least significant fOUT bits of a register dUling certain types of deCimal arlttrnetlc operations. It Is cleared when a carry does not occur from \Ills lowel half of a byte. (The el\1lt binary cells tIlat make '" a register are sanetlmes referred to as a Dyts DId you I
slbtraction instructions take one.. two or three bytes depen!ling on the at1t1resslng involveO. The group of Subtraction Instructions Iisteo represeno. four differen t types Of aCldressing mode$.

Those such as SUlA UH and SUlA u.. utlllze ...ret is known as /npJ/ec/ addressing. That Is, the opcode itself specifies the registers or locations that are affected by the qJelatlon. The hexadecimal opcode 20 (""Iell Is 0 0 1 0 0 0 0 0 In binary) tells the CPU everything it has to i
..... , .

.----

,,

,,

""te \hat these two adttress bytes are considered as part of the instn..,tion. mus, this directive t

15

LOA nnnn LOA ~ LOA LL LOA XH

I'{j

LOA XL LOA YH

04 94

LOA YL

14

f'oA

24 84

•

Here Is what you need to koow about this group of InstrucUons: (1) A "copy. of the InformaUon in the specified memory locaUon or register is always transferred (loaded) into the accurrulator. (2) TIle status Of the Z (zero) flag will reflect whether or not the value transferred was equal to zero. (3) TIle other flags are not affected by this type of operation.

~

B

E

Zero flag

6 lelelelelelelelel ~

Ixlxlxlxlxlxlxlxl -...1_

(Initially)

~ ~.lel.I.I.I.I.I.1 ~l I]]

-.(result)

Zero flag (rewlt)

)( • Does not malteI!

-

There, that was easy wasn't It? All these instructions do is provide a means of moving information about in the computer system. Note that you can transfer data from the CPU regIsters and (using several addressing modes) from locations in memory. ThIs particular g~ always places the data into the acru:nulator.

L;

1 1 1 1 1 1 1 1 1-

/ ~

¥

PC

•

,.

which all the bits are cleared to zero) haS mary practical applications. It is often used to denOte the end of data in lookup tables, to mark the end of

a string of stored text, and so forth. So, being able

ta easily detect the presence Of a zero byte when it is first loaded into a location.. can have considerable practical programming value. The LH58D1 designers knew this and thus permitted the

zero flag to be affected ~y this operation, whUe protecting all other flags. The load directives are used so extensively in

machine language programming that it is convnon to provide supplemental types of instructions. For instance, the CPU used in the Sharp PC-1500 has the following special load directives: Code

65 45 55 67 47

57

XH

X Y STD. POUlTER

Xl

....ry

Yl

: inwniJ' M.U----.:;;rstus : ::

You might also want to take note of the fact that only one CPU flag Is affected by this type of directive: the zero (Z) flag. Can you think of any reasons why the deSI!P'TS allowed only this flag to be affected by the load

1

"7

F Ul

:::

load operations? Because, as will be illustrated

later, being able to detect a "zero byte" (a byte in

'~m

U

$I'

with carry instructions would be worthless dUring such operations. But why let even the zero flag be influenced by

lOAI (U) LDAI (Xl LDAl (y) LOAD (U) LOAD (Xl LOADM

UH

VIi

'--"

PC=PC·2

1 1 1 1 1 1 1 1

Because these numbers take more than one byte in which to be stored, they have to be proceSSed in byte-sized sections. If a load directive interfered with the status of. say, the carry flag. then the add

Mnemonic

10 I 1 Q 1

/

There are several good reasons. One is that some of the other flags, such as the carry, need to be maintained When multiple-precIsion arithmetic Is being performed. (That Is arithmetic Where the numbers being manipulated are stored in two or more bytes, yet are considered as one value.)

/

~c

: :~

1

1

u;u.,-

~ Yl

STACK

ill

~

,




78

78C.

-'.

18(0

CPU

r-........

= ,ac2 ,ac}

CPU

-ry

~~~~iP.:j

(no carry) tile secood runDer to the memory location Where the first ntrnber was storect If tile nuntJers to be added were 3 and 4 and tile hexadeCimal address Of \he storage locatiOO in memory was 7800, here Is hOw \he mactline code for this series of instructloos "OIJIO appear (in hexaoecimal notatlon~ B5 03 PC 78 DO EF 78 DO 04. The accompanying pictorials illustrate eacn step of tile program's operation. You can try this program out for yourself by loading it into a PC-1500 or PC-2. one ,"ay to dO this is to use BASIC POKE statements. Here is a BASIC program that will loaa and \hen execute those mactline 1 '806 18C7

78es 78C9

40:ENJ

-

CPU

Line 10 of this progra-n places \he actual machine codes (using hexaoecimal notatloo) into tile PC's merrory. These Instructioos ale being stored in \he portioo of merrory normally used to hold tile BASIC variable f>$, starting at tile hexaoeclmal address 6o.78C0. The values following the faur-dIglt address are tile actual mactllne

codes for the program in hexadecimal format. (The last byte in line 10, &9A, is the Code for a machine language directive that will cause the machine language program to be exited back to BASIC.) Line 20 causes the machine language codes to be executed starting at hexadecimal address 7BCO (where the program was stored~ After executing those machine code directives" control returns to the BASIC program. Line 30 causes the PC to display the contents of the memory location having the hexadecimal address 7800. This is the first byte of the area In which the BASIC variable B$ is normally stored. The machine language program uses this location to store the first number (from the accurrulator~ It is also the location where the ADNC instruction takes actioo and leaves the results of the addition (without carry) operation. Line 40 denotes the end of the BASIC code. Executing this BASIC program by placing the PC in the RUN mode and executing GOTO 10 or RUN should result in the value 7 being displayed. 00 you understand everything that is gcing on at this point? Does everything in the deSCriptive pictorials that portrays the operation of this

machine language procedure make sense? If not., now is a good time to review the earlier parts of this text. By the way, attempting to examine the operation of machine language routines by using PEEK and POKE directives is a very slow and tedious method. A far better tool to use is a machine language monitor program. This is a special program designed to facilitate working at the machine code leveL If you plan to make a serious study of this diSCipline" 1 strongly recommend that you obtain a copy of the LoaderlMnltorlDlsassembler package sold by the POCKET Ga'fl.l7ER I\EWSLET7ER This is a powerful tool that makes it easy to place machine codes into memory.. examine ttle contents of -memor.y... execute machine language routines.. and so fortti;--m--a--dHecLrnode.. without having to translate through PEEK ana-POKE directives. The disassembler program which Is part of this package utilizes the Rober fvfnemonics wnich are used in this text. It Is able to translate machine codes directly into these mnemonics. Hence, it is highly useful for verifying that machine language routines have been properly loaded into memory as well as for use in exploring "uncharted" areas of memory (such as ROMs~ The loader part of this package makes it easy to put together sections of a machine language program Plus, the package provides a convenient means of saving and restoring machine code programs by using a cassette recorder. No serious M..P student sto..Ild be without such a tooL 18

nech:ine l~ Ptogr..nno

CGpyrltbt 1'"

Is learning to program in machine language worth all the trouble? Not for everybody. It dePends on what you want to end up being able to do. You now can probably begin to see that dealing at the machine level greatly complicates matters from the programmer's view. It tOOk nine bytes of memory storage just to specify the adding together of two tiny mmtJers. Even with such a simple task.. one had to be concerned with the use of the carry flag. The work is greatly cOfTlJOUl1ded when one has to start dealing with larger values or non-integer quantities. But, you can probably also gather that the degree of control at this level is fantastic. You are able to dictate every aspect of the machine's operation. Streamlining the flow of operations to accompliSh a specific job is just one noticeable benefit. Speed of operation is another. Do you realize that those three instructions used to add together two simple numbers can be performed in about 25 millionths of a second? You could string together some 40,000 similar sequences and still have them all performed in less than a second! If you still want to hang in there and learn more about the subject, then read on. It is time to describe some of the logical operations that the LH5801 CPU can perform. The Logical PN)

The next few classes of instructions that will be discussed are those known as Boolean logic operations. In the LH5801 these mathematical operations are always performed on the contents of the accumulator or on the contents of a location in memory. The ability to perform these types of logic operations are valuable in many applications. Indeed, they give the computer the ability to dUplicate the type of electronic logic found in modem electronic digital circuitry. These logic operations are always performed on a bit-by-bit basis between the accumulator (or a memory register) and the operand byte. The results of the operation are stored in the accumulator (or memory register~ Furthermore, the status of the Z (zero) flag will be affected by the results of the logic operation. Thus, these types of directives, among others, ultimately provide the computer with a means of modifying its own behavior dependjng on j(s fjndjngs as it examines data The first group of Boolean logic operations to be presented are those that perform a logicali>NJ operation between the accurrulator (A register) and another byte of data in memory. Mnemonic Code PKJAIm B9 PKJA (U)

POaCET COIPUTER NEUSlETTER

29

N-OA (X) D9 N-OA (y) 19 IV-VA rrrn A9 Note that there are three types of addressing provided: irrmediate, register IrlIl1rect, and direcL To save space In the future, pictorials sho'Nlng the addressing rmdes for eacn class of Instruction will not be provided. Refer to the earlier diagrams when necessary to refresh your memory concernIng

-

addressing relationships. The execution of one of the abJve Boolean .AND directives by the LH5801 CPU does the following. Each bit position in the acct.mJlator is COOll"red to the corresponding bit position in the operand byte. As this Is done, a logical I'NJ operation Is performed between the identically-positioned bits. If both the bit In the accumulator and the bit In the operand are set to the logic 1 state, then the bit In the acct.mJlator will be left in the logic 1 condition. For all other possible combinations (the bits are opposite in state or both are zero), the bit in the acct.mJlator will be left at the logic 0 (cleared) state. If all of the bits In the accumulator end up being zero, then the Z flag will be set. Otherwise it will be cleared. N:Jne of the other CPU flags are affected by the operation. The contents of the operand byte are not altered by the procedure.

II lei I 101 I 1011101 ~!gi=::" II II 1010111110101 c.:.::. -:.u... 1110101.111-101.1 =:::,: The logical I'NJ operation may also be performed '4JOfl the contents of a particular rnerrory location through the following COOYTlands: l'ffmonic IV-V (lJ) m. IV-V (X) m. IV-V (y) m. IV-V rrrn m.

COde

69 49 59 E9

The Logical Or

As was the case for the loglcall'NJ directives, the

logical OR instructions may be divided Into tloIO grfJl4lS: those that leave the result In the acct.mJlator and those that leave the result in a memory location. The Ilrst gr"-,, has the following mremonlcs and codes: Mnemonic Code rnA m. BB rnA (U) 2B rnA (X) III rnA (y) 18 rnA rrrn PB The Boolean OR operation Is also performed on a bit-by-bit basis. For the aboVe Instructions, the operation takes place between the acct.mJlator and the desiglated operand byte with the results being left In the aro.mulator. A bit position In the accumulator is set to a ioglc 1 if either It or the corresponding bit position in the operand Is set to a logic 1. Note that the case where tlley boUl are a 1 also satisfies the corlIl1t1on. But, if neither register contains a 1 in a given bit position, then the acct.rnUlator bit for that position remains in the logic zero state.

.

11101110111011101 ~~=: 1111101011111.1.1 ':'!. ~... 1IIIIIIolllllll.I==~:

The sane procerures OWly with these directives except that row the operation takes place between the desiglated rnerrory location and the irrrnediate data byte that is part Of the instruction. The results are left In the designated memory site. Only the Z flag Is Influenced by the operation. Logicall'NJ operations are particularly useful for performing what are known as masking or striWing operations. That Is, when It is desired to eliminate just a portion of a register's contents. CopyJi.-,. 1913

For instance, if one wants to retain j.Jst the four least significant bits of an 8- bit register, the enUre contents Of that register may be AN:led with a register containing the hexadecimal value OF. Try It yourself (mentally or with the help of pencil and paper) to see how the '-"Walted half of the byte is re
CClppi~

'01 SlO""

of Z fI..

This type of Instruction Is particularly useful in determining If a particular btt within a byte Is set. Note, however, that it is the status of the Z flag alone that reflects this information. None of the bits within the acet..rnJlator or memory are altered. TIlis operation Is an eXinllle of what is often called a non--destrwllve test or COIT'4l'Irison. TIlls Is beCause none of the information Involved In the test is altered or lost. If you clJl'Tllare the operation of this type of directive against that of the regular logical N-D, you will note that the value in the results register (the aca.rrulator or memory location) can be altered by the procewre. Here are the bit test instructions that the CPU Is aIlle to execute in a PC-1SOO or PC-2: Mnemonic BITA 1m BITA (I.J) BITA (Xl

B1TA M BITA rnT1

lt1' POCIET COIPUTER IEVSlfTTn

Code ElF

2F IF IF N'

BIT (U) 1m BIT (Xl 1m BIT (y) 1m BIT nrTrllm --

6D 4D

50 ED

101010101010111.1 ~~oi==ts 1.1.1.10101.11101 ~~ ~:-

COmpares

The next series of instructions to be discussed are

slmllar In one concept to tl1e bit test group. Tnat Is they also utJlize an internal (virtual or invisible)

1.1.101.1.1.11 1.1 "'"::'=-~

register to store the result of a comparlson. The

status of tl1e CPU flags are then cnanged to reflect tl1e condl tJons in this Internal register. NorJe of tl1e regular CPU registers or memory locatJons that are accessible to tl1e programmer are actually mool fled by the operation of tl1ese instructions. However, these instructions dIffer in the manner In Which tl1e comparison is made. In tl1e bit test group, a logical AND was used to compare bits. In tl1e compare directives, tl1e operand value is S1.Jl.lfJ"8ctet.l (using the two's complement method) from the accumulator. another CPU register or a memory location. The results of thIs SUbtraction are neld temporarily in an internal (invisible) CPU register. The carry (C) and zero (Z) flags are then

-

set accoraing to those results. (The V and H flags may be altered by these operations, too, but their settings would not be of value after such procedures.) The carry flag is set after the comparison if the result of tne comparison indicates that the operand was less than ttle compared value or was equal to

the compared value. The carry flag is cleared after the comparison if the operand was greater than the compared value. The zero flag is set if the comparison indicates that the values were equal. OtheNise it is cleared.

The comparison instructions are among the most important directives in the entire command set in one particular regard: decision making.

These instructions enable the computer to make decisions based on the results of comparisons. Other directives.. to be introduced shOrtly.. can then

lolololololoillolllr~"!.:.:'=ts

10101010101010111 ~~~~

Flag status Mhen the conpand register is lugu than tM opuMd.

101

S..ws of l Fl..

m

stotus of C Fl..

Flag status IIhen the conpared l'egister

is

equal to the opel'w.

m m

Status of Z flag Status of C flag

10101010101011101 "'!oi':"'''7.,:ts 10101010101110101 "':.":'!. ~~ lolololololoillol"'"::'~ ':f'~~"«'~'~'«="~-=l~'-WT""'''~'L''-':1

Inte:rnal Result

L!J!JJJJ. IJ . J. !.lt!J AfUr tile _ . Flag status tIhen the l'egiste:r is

conpaI'ed

less tI'ten the operand.

1.1 1.1

Status of Z Flag Status of C Flag

cause the computer to execute a different series of

instructions (trus mooifylng its behavior) based on the decisioos made as a result of compariSons. Since these instructions are so central to the prowctive use of a computer.. there is a good

complement representing various a
Loa! X-hI!1J wltn 77. RefIerse bnn:fl to w tne LDXL ~ instructIon again lnI go t/nru11 sewll half of LCD buffer area.

special "oor.-,..,,,,,.."'II"' tnat will pass control back to BASIC pIogl

LOA (Xl

BO FF 41

EDRA IFF

4E 4E 99 Il8

STAI (Xl CPX!. #4E RBNZ fll8

we

78CC

4Cn

71!1J'. 7&JO

8B1JII 4877

CPXH #n FBZ #OIl LDXH #77 RB #12

71102 91012 RTS 9A 7804 Does It mal
... -• PC

pe,,7800

A

1

u

'"

•

VIi

ShSP-02

SI'

In

ILU

oioGi..... :: :
u NOte that since two oytes are required for each address m page FF and since there are 2S6 Oytes on that page, this type of call atrectlve can only refer to one of 128 atfferent memory addresses stored on page FF at any given time. NaW here is the reasm why thiS type of directive will De of purely edUcational Deneflt to many PC users: In tne Sharp PC-lSOO and Radio Shack PC-2, tne address range FFDD - FFFF Is oCC\.4Jled Oy ROM! It Is fUled with address values that refer to SUOroutlnes used by tne BASIC p::I

SP=$P-02

interMl Itli Reoisters : :: :.. CPU

-

manner as the jump to sLiJroutine alrectlve. wnen executed, tne aaaress of the byte that follows the opcode will be stored on tne stacK as the "return to"

address. It is a pretty clever little directive, one not found on typical CPus. And, In the case of its application in the Sharp PC-1500, Its use ends up saving a significant amount Of memory. For instance, wOrl

'OA

VN

..... 1Inn CPA YH R8H linn

08 09

$lA

R8IIV,""

OA

CAll OA

.-

RBY linn SUBA UH SUBA nnnn ADM UK fi)[)A

nnnn

LOA UN 'OA nnnn CPA UK

ANDA nonn lOSII nonn

'" AD

"'A """"

70

,. "'"

J8

78

8' B'

lG

"

"

AAtA CALL 02 ROA (X) Cl\.l 04 SM Cit.l 06

RBI Bnn DADA (V)

RaNZ linn

'" At

.,

OTS

I.,,,

.

00 01

CAl '""

" "O'01

AS

.7

CPU C4 CANH linn CAll C6 CIIrt linn

CC

FB '""

RBNC linn

""

CAt 11M

FBV ....

91

97

EeRA Imn JSR nonn BlTAllnn CAll CO CANe Imn CAll C2

CANZ 11M CAll CA

90

"" ,."

linn

"CA

'no

(y)

LOVH MM AND (Y) Inn LOYL Inn CR (V) linn CPYH #on BIT (v) linn CPYL tiM

ANDA

cru ca

lInn

INY 'OAI (V) DEV LOAD (V)

ST~

CPA Imn

CO

FBI fBHY

11 72 7J 74 15 76 77

J9

BIUD ItM FBNZ lInn

80

J4 J> J6 J8

FBH lion

DADA (X)

))

)1

FBHK linn CPA xtI

Be

SF

6C 6£ 6F

..

STAI (Y)

..." ,....... 6S

.,""

B. Be

fae linn LOA XN

CPA nnnn

DADA (U) E CALL .. CALL D6 CAlL DB CAlL IlA CALL DC CALL DE CIU £0

BO

ROllA ( V)

BIT BIT BIT BIT

7e

.. (. ) ""'" (X)

-...,. ( X) ...,. ( V)

CIll DO

7F

.....

(U)

78

7D 71'

..... 1Inn

_11M _

S.

E.

EA EC EE FO F2 F.. F6 Fe

n

CAl " "

eLOe CPA 8M CPA ( U) CPA ( X) CPA (V ) CPA noM

., ,... 29

'" 6D

4l 50

ED Sf

2f OF If

.. ~

CJ C7 CD CD

. C2

C. C8

co CC

'"

.

DO D2

DO DB

DA

DC DE

E. E2 E. E. E. E. EC EE F• F2

f. f. F. FA

nnMOnic CPA UtI

CPA Ul

CPA XH CPA" CPA VH CPA YL C'Al (X)

c.... 1IM CPUl 11M

ePlOl 8M CPlO. 1M

CPVH .... Cl'V1. ..... DADA (U) DADA (X)

DADA (V) DEA DEU

(X) (V) Inn (U)

(X) , (lOA ( V) ElII. MOO

Fe _ FIIC linn

.BIIl

linn

,BY Inn

1111 IlIIll I"" 1m

INY

LOA ( U)

os C9

Cf

C8

F.

87 27 .7 17 IV

.C

(R fWln

so 52 2C DC

Ie BO 7D

. DO

10 BE

LOA ( X) LOA (V) LOA mnn LOA III LOA II.. L..... LOA " LOA VH LOA '11. LOAD (U)

.... (U)

.... (X) (RA ( Y) {IIA nnnn RBInn RBC linn .... Inn ..... 1Inn

-..., --

-RBV linn RBI linn

"'"

.." "to Of

...,.

DO

RTI ors

.7

4l

54

BE II> 2>

""

.....,. .... f6

14

"

1m

{IIA Inn

RDI. (X) ... (X) RlCA

.II' nnnn

FE

....

OF

50

C1

LOA] (V)

... (X) linn ... (V) 11M

...

Code

.7

.," "

...... ... 4S

... (0) linn

At

f8Z Inn

INA

(X)

8C

__ .. .... ... ,.... ..

_1M..... ,'''''' F8H Inn

(U)

"

42

.... .... E{IIA E{IIA E{IIA

(X) (V)

,.'"

DEXl

DEV

LOAD LDAD LOAI LOAI

...

F7

6C

62

om os.. (U)

_0 LDSI nom LDIIl linn lOUl 11M l DlOt blnn lDXl 1M LDVM ..... LO'I1. linn

DEUl DEX

JSA nnnn LOA Inn

Fe

.. ..,..."

co.

ROIl

ROI, ROI2.

ROt2b

S(lC

.... sr.

StA

(U) ST. (X) SrA (V) 51" nrR'I Sf A lff

50

....." 50

..,. ..'"" 56 E.

9E

.," 91

.... " .... ".. ...... os

90

Fl

07 0] DO

EI

01

.." ..

2£

IE

2t

STA tl.

2A

SfA MIt

at

STIl Xl

OA

STA VH

18

SIA Vl

., ".. "

STAD (U) sr.. (X) STAD ( V) STAl (U) STAl (X) STAl (Y)

1A

.]

..

_0 - .,

co.

SJI (X)(V)

.,'5

..... ( U)

21

.....

..... (X) SUBA ( V)

11

SUBA ~

AI

SUBA III SUBA Ul SOOI\ ""

SUBA XL

..... "

SUBA '"

. AD

20

DO 90

I.

IT1511lre 1lisIIed

Shack PC-2

by

Po::Iter oould be estaDllSlled, say ~ register LL. Eacn time the STAI (X)COOII'oand 1oI~ perfo/lT1OO, the count In LL oould be decrernenlf J When tnls count reacnea zero, It Io/OUld be Ume t, stop stuffing zeros Into memory. ltus, one coo J use the sequence of alrecUves (after the STAI (xl instruction) consisting of: CELL ana RBNZ That Is, decrease the cwnt In register LL ana If ,T Is stlll non-zero, men loop back to repeat the STM (X) directive. If tnls metlDl was used. In lli'l 8Xlr1ll18, men register LL Io/OUld initially tlaver, De set to the decimal count of 64 (heXadeclma1l1o) repl'e$8Otlng the ruT1ber of bytes In memory (fro'" &.78CO tnrough &.78FF) thet \oIere to be cleared. the """""l'8'lying listing for a oetallea eXlrlllle ., tills meum If you \oIere wloe awake When you read t '" previous section Of tnls series, men you mI~ \' remember that tnls type of situation Is loeaI for t', use of the BNZD .,.., Instruction. Sin;e, tIl'.IeWr the BNZD directive tests for zero Derom j decrements the contents In UL, men the COiI ;\ Initially placed In LL rrust be one 18$$ man t .... ruT1ber of loops (locations to be cleared). Thus,>tnls specific eXlrlllle, If BNZD was usaQ. reglsl", UL Io/OUld need to start out wltn a count of dec1m./ 63 (which Is hexadecimal ~~ An accornpa-I)Il':5 listing Illustrates tnls rnetnod. too. Yel another way of oetermlnlng When to slo' looping ",ould De to cned< for an approprl, :. address Value In CPU register X. In tnls case, whethe value In X exceeded &.78FF 0."" reacIl< ,I ~7900~ men It would De time to dlscontl...., I", clearing operation. There are several ways tI'