Motorola 68000 CPU Opcodes Mnemonic ORI to CCR ORI to SR ORI ANDI to CCR ANDI to SR ANDI SUBI ADDI EORI to CCR EORI to SR EORI CMPI BTST BCHG BCLR BSET BTST BCHG BCLR BSET MOVEP MOVEA MOVE MOVE from SR MOVE to CCR MOVE to SR NEGX CLR NEG NOT EXT NBCD SWAP PEA ILLEGAL TAS TST TRAP LINK UNLK MOVE USP RESET NOP STOP Mode Postincrement Predecrement

Size B W B W B W B W B W B W B W B W B W B B B B B B B B W W B W W B W B W B W B W B W W B W

L

L L L

L L L L L L L L L L L L L

L L L L L

L B B W L W L

A7 D0

Version 2.3

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

A6 D1

Single Effective Address Operation Word 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 S M Xn 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 1 0 0 0 0 0 0 1 0 0 1 1 1 1 1 0 S M Xn 0 0 0 0 0 1 0 S M Xn 0 0 0 0 1 0 0 S M Xn 0 0 0 0 1 1 0 0 0 0 1 0 1 0 0 0 1 1 1 1 0 0 0 0 1 0 1 0 0 1 1 1 1 1 0 S M Xn 0 0 0 1 0 1 0 S M Xn 0 0 0 1 1 0 0 M Xn 0 0 0 1 0 0 0 0 0 M Xn 0 0 0 1 0 0 0 0 1 M Xn 0 0 0 1 0 0 0 1 0 M Xn 0 0 0 1 0 0 0 1 1 Dn M Xn 0 0 0 1 0 0 Dn M Xn 0 0 0 1 0 1 Dn M Xn 0 0 0 1 1 0 Dn M Xn 0 0 0 1 1 1 Dn An 0 0 0 1 D S 0 0 1 S An M Xn 0 0 0 1 S Xn M M Xn 0 M Xn 1 0 0 0 0 0 0 1 1 M Xn 1 0 0 0 1 0 0 1 1 M Xn 1 0 0 0 1 1 0 1 1 S M Xn 1 0 0 0 0 0 0 S M Xn 1 0 0 0 0 1 0 S M Xn 1 0 0 0 1 0 0 S M Xn 1 0 0 0 1 1 0 Dn 1 0 0 1 0 0 0 1 S 0 0 0 M Xn 1 0 0 1 0 0 0 0 0 Dn 1 0 0 1 0 0 0 0 1 0 0 0 M Xn 1 0 0 1 0 0 0 0 1 1 0 0 1 0 1 0 1 1 1 1 1 1 0 M Xn 1 0 0 1 0 1 0 1 1 S M Xn 1 0 0 1 0 1 0 Vector 1 0 0 1 1 1 0 0 1 0 0 An 1 0 0 1 1 1 0 0 1 0 1 0 An 1 0 0 1 1 1 0 0 1 0 1 1 An 1 0 0 1 1 1 0 0 1 1 0 D 1 0 0 1 1 1 0 0 1 1 1 0 0 0 1 0 0 1 1 1 0 0 1 1 1 0 0 0 1 0 0 1 1 1 0 0 1 1 1 0 0 1

A5 D2

A4 D3

A3 D4

A2 D5

Data 0 B I 0 W I I 0 B I 0 W I I I I 0 B I 0 W I I I B N B N B N B N B N B N B N B N W D

0

W D

0 1 0 W I

Register List Mask A1 A0 D7 D6 D6 D7 A0 A1

D5 A2

Mnemonic RTE RTS TRAPV RTR JSR JMP MOVEM LEA CHK ADDQ SUBQ Scc DBcc BRA BSR Bcc MOVEQ DIVU DIVS SBCD OR SUB SUBX SUBA EOR CMPM CMP CMPA MULU MULS ABCD EXG AND ADD ADDX ADDA ASd LSd ROXd ROd ASd LSd ROXd ROd

D4 A3

D3 A4

D2 A5

Size

W L L W B W L B W L B W B W B W B W L W W B B W L B W L B W L W L B W L B W L B W L W L W W B L B W L B W L B W L W L B W L B W L B W L B W L B W L B W L B W L B W L

D1 A6

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

D0 A7

Single Effective Address Operation Word 1 0 0 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 1 1 0 0 1 1 1 0 1 0 1 0 0 1 1 1 0 0 1 1 1 0 1 1 1 0 0 1 1 1 0 0 1 1 1 0 1 1 M Xn 1 0 0 1 1 1 0 1 0 M Xn 1 0 0 1 1 1 0 1 1 M Xn 1 0 0 1 D 0 0 1 S An M Xn 1 0 0 1 1 1 Dn M Xn 1 0 0 1 1 0 Data S M Xn 1 0 1 0 Data S M Xn 1 0 1 1 M Xn 1 0 1 Condition 1 1 Dn 1 0 1 Condition 1 1 0 0 1 Displacement 1 1 0 0 0 0 0 Displacement 1 1 0 0 0 0 1 Displacement 1 1 0 Condition Dn Data 1 1 1 0 Dn M Xn 0 0 0 0 1 1 Dn M Xn 0 0 0 1 1 1 Xn Xn 0 0 0 1 0 0 0 0 M Dn S M Xn 0 0 0 D Dn S M Xn 0 0 1 D Xn S Xn 0 0 1 1 0 0 M An M Xn 0 0 1 S 1 1 Dn S M Xn 0 1 1 1 An S An 0 1 1 1 0 0 1 Dn S M Xn 0 1 1 0 An M Xn 0 1 1 S 1 1 Dn M Xn 1 0 0 0 1 1 Dn M Xn 1 0 0 1 1 1 Xn Xn 1 0 0 1 0 0 0 0 M Xn M Xn 1 0 0 1 0 0 M Dn S M Xn 1 0 0 D Dn S M Xn 1 0 1 D Xn S Xn 1 0 1 1 0 0 M An M Xn 1 0 1 S 1 1 M Xn 1 1 0 0 0 0 D 1 1 M Xn 1 1 0 0 0 1 D 1 1 M Xn 1 1 0 0 1 0 D 1 1 M Xn 1 1 0 0 1 1 D 1 1 S Dn 1 1 0 Rotation D M 0 0 S Dn 1 1 0 Rotation D M 0 1 S Dn 1 1 0 Rotation D M 1 0 S Dn 1 1 0 Rotation D M 1 1

M

Xn

by GoldenCrystal

Data 1 1 0 1

Brief Extension Word Displacement S 0 0 0

W M

W W W W

D D D D

Addressing Mode Data register Address register Address Address with Postincrement Address with Predecrement Address with Displacement Address with Index Program Counter with Displacement Program Counter with Index Absolute Short Absolute Long Immediate Operation Size Byte Word Long Condition True False Higher Lower or Same Carry Clear Carry Set Not Equal Equal Overflow Clear Overflow Set Plus Minus Greater or Equal Less Than Greater Than Less or Equal

Suffix .b .w .l

Direction Register to memory Memory to register

Dn An (An) (An)+ -(An) (d16, An) (d8, An, Xn) (d16, PC) (d8, PC, Xn) (xxx).W (xxx).L #imm

S S S 0 0 0 1 0 1 0 1 1 1 0 1 1 0

Mnemonic T F HI LS CC CS NE EQ VC VS PL MI GE LT GT LE

Data Type Immediate Bit Index Displacement Optional Displacement Register List Mask

Format

0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

Letter I N D D M D D 0 1 1 0

Cond 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

0 0 0 0 1 1 1 1 1 1 1 1

M 0 0 1 1 0 0 1 1 1 1 1 1

0 1 0 1 0 1 0 1 1 1 1 1

0 0 0 0 1

Xn reg reg reg reg reg reg reg 1 1 0 0 0

0 1 0 1 0

Direction Right Left

d D R 0 L 1

Rotation Immediate Register

M 0 1

Mode Dn -(An)

Data Size Byte Word Long Any

Direction Dn ♦ → Dn ♦ Dn →

M 0 1

Letter B W L

D 0 1

http://goldencrystal.free.fr/M68kOpcodes-v2.3.pdf