Extension for MSX function : co-processor + SD interface target price

function : co-processor + SD interface ... Why SD interface on same cartridge ? ... expensive double port ram , and pld's and more logic , this costs a lot as we can ...
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Extension for MSX function : co-processor + SD interface target price : 90 euros Why co-processor ? Execute portion of code much faster , keep Z80 compatibility. Why SD interface on same cartridge ? To make it more attractive for the 90 euros price. To avoid that co-pro takes one more slot. How interface is made ? With FPGA , the craignell1 module with spartan 3E 100 module, dip 40 :easily solederable. Most of the problem is in the interface of the co-pro with msx , it would usually require an expensive double port ram , and pld's and more logic , this costs a lot as we can see on Z380 cartridge. So the FPGA can be justified , it will cost around 55 euros alone. 5 euros is added for the bios rom. 17 euros for the pcb 8 euros for the SRAM external 5 euros case =90 euros. What is the interface with FPGA ? FPGA is a dip 40 it has 38 I/O plus 2 VDD/GND pins. Interface with SRAM requires: 8 bits + 17 address for 128kb + /WR to sram = 26 lines interface with MSX 8 bits for IO bus + 1 bit port address + 1 bit /CS + 1 bit /WR from cartridge = 11 lines interface for SD card 1 bit for Cselect SD or SRAM the other bit are shared with sram Register interface with MSX Reg0 – Write = control register bit0 : reset co-pro bit1: suspend co-pro bit2 : write data to sram bit3 : read from sram bit4: auto -increment bit5 : reset sram address counter to zero bit6 : add sram address counter with 4000h bit7: SD/SRAM switch. Reg0 – Read = Status register B7-0 : coming from co-pro for program execution status , application dependent , general purpose register free for the application, basically when the co-pro is « done » it should tell cpu through this register.

reg1 – R/W data b0-7 : data read or to be written to sram/sd

3v3 regulator SD connector D7-0

MSX slot

IORQ A7-1

logic

CS

D7-0

A0 WR

CS

FPGA craignell1 spartan3E 100 DIP40 module

SRAM 128kb

BIOS DOS1 16kb

How to send a bunch of data to sram ld a,21h ; reset adress counter & co-pro out (port0),a ld a,first_byte out (port1),a ld a,15h ; sets write mode & write first byte out(port0),a ld c,port1 otir ; sends the other bytes in a bunch How to unleash the co-pro : ld a,0h out (port0),a